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From: Jagan Teki <jagan@amarulasolutions.com>
To: u-boot@lists.denx.de
Subject: [PATCH 2/2] mtd: spi-nor-ids: Enable 4B_OPCODES for is25wp256
Date: Mon, 20 Apr 2020 15:36:07 +0530	[thread overview]
Message-ID: <20200420100607.23009-2-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20200420100607.23009-1-jagan@amarulasolutions.com>

IS25WP256 flash chips do support 4byte address opcodes,
so enable support for it.

Cc: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 drivers/mtd/spi/spi-nor-ids.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 973b6f86c9..f95bfb59e6 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -135,7 +135,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("is25wp128",  0x9d7018, 0, 64 * 1024, 256,
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("is25wp256",  0x9d7019, 0, 64 * 1024, 512,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_4B_OPCODES) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
 	/* Macronix */
-- 
2.17.1

  reply	other threads:[~2020-04-20 10:06 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-20 10:06 [PATCH 1/2] mtd: spi-nor: Enable QE bit for ISSI flash Jagan Teki
2020-04-20 10:06 ` Jagan Teki [this message]
2020-04-20 16:31   ` [PATCH 2/2] mtd: spi-nor-ids: Enable 4B_OPCODES for is25wp256 Sagar Kadam
2020-04-20 16:26 ` [PATCH 1/2] mtd: spi-nor: Enable QE bit for ISSI flash Sagar Kadam
2020-04-20 16:27   ` Jagan Teki
2020-04-20 19:17     ` Sagar Kadam

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