[PATCH 3/8] clk: rk3399: Enable PCIE_PHY clock

Jagan Teki
2020-04-26T09:38:49Z

On Sun, Apr 26, 2020 at 1:54 AM Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>
> > From: Jagan Teki <jagan@amarulasolutions.com>
> > Date: Sat, 25 Apr 2020 16:33:49 +0530
> >
> > Add PCIE_PHY clock enablement support on rk3399
> > clock driver.
> >
> > This clock is enabled by default, so do nothing
> > if it triggers during the PCIe PHY probe other
> > PHY users on this clock will simply fail.
>
> This breaks Ethernet on my firefly-rk3399, and I suspect it does the
> same on other boards:

Yes it does. It's affected by the v5.7-rc1 sync series. Will update
the fixes on that series, thanks!