* [PATCH v2 1/3] common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c
2020-03-29 17:57 [PATCH v2 0/3] common/board_f: Make reserve_mmu generic Ovidiu Panait
@ 2020-03-29 17:57 ` Ovidiu Panait
2020-03-30 23:56 ` Simon Glass
2020-04-26 11:25 ` Tom Rini
2020-03-29 17:57 ` [PATCH v2 2/3] arm: asm/cache.c: Introduce arm_reserve_mmu Ovidiu Panait
2020-03-29 17:57 ` [PATCH v2 3/3] common/board_f: Make reserve_mmu generic Ovidiu Panait
2 siblings, 2 replies; 10+ messages in thread
From: Ovidiu Panait @ 2020-03-29 17:57 UTC (permalink / raw)
To: u-boot
Move the ARM-specific reserve_mmu definition from common/board_f.c
to arch/arm/lib/cache.c.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
---
arch/arm/lib/cache.c | 28 ++++++++++++++++++++++++++++
common/board_f.c | 28 ----------------------------
2 files changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 007d4ebc49..b8e1e340a1 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -10,6 +10,8 @@
#include <cpu_func.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Flush range from all levels of d-cache/unified-cache.
* Affects the range [start, start + size - 1].
@@ -118,3 +120,29 @@ void invalidate_l2_cache(void)
isb();
}
#endif
+
+__weak int reserve_mmu(void)
+{
+#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+ /* reserve TLB table */
+ gd->arch.tlb_size = PGTABLE_SIZE;
+ gd->relocaddr -= gd->arch.tlb_size;
+
+ /* round down to next 64 kB limit */
+ gd->relocaddr &= ~(0x10000 - 1);
+
+ gd->arch.tlb_addr = gd->relocaddr;
+ debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
+ gd->arch.tlb_addr + gd->arch.tlb_size);
+
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+ /*
+ * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
+ * with location within secure ram.
+ */
+ gd->arch.tlb_allocated = gd->arch.tlb_addr;
+#endif
+#endif
+
+ return 0;
+}
diff --git a/common/board_f.c b/common/board_f.c
index 82a164752a..a88bd64630 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -385,34 +385,6 @@ static int reserve_round_4k(void)
return 0;
}
-#ifdef CONFIG_ARM
-__weak int reserve_mmu(void)
-{
-#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
- /* reserve TLB table */
- gd->arch.tlb_size = PGTABLE_SIZE;
- gd->relocaddr -= gd->arch.tlb_size;
-
- /* round down to next 64 kB limit */
- gd->relocaddr &= ~(0x10000 - 1);
-
- gd->arch.tlb_addr = gd->relocaddr;
- debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
- gd->arch.tlb_addr + gd->arch.tlb_size);
-
-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
- /*
- * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
- * with location within secure ram.
- */
- gd->arch.tlb_allocated = gd->arch.tlb_addr;
-#endif
-#endif
-
- return 0;
-}
-#endif
-
static int reserve_video(void)
{
#ifdef CONFIG_DM_VIDEO
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 1/3] common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c
2020-03-29 17:57 ` [PATCH v2 1/3] common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c Ovidiu Panait
@ 2020-03-30 23:56 ` Simon Glass
2020-04-26 11:25 ` Tom Rini
1 sibling, 0 replies; 10+ messages in thread
From: Simon Glass @ 2020-03-30 23:56 UTC (permalink / raw)
To: u-boot
On Sun, 29 Mar 2020 at 11:59, Ovidiu Panait <ovpanait@gmail.com> wrote:
>
> Move the ARM-specific reserve_mmu definition from common/board_f.c
> to arch/arm/lib/cache.c.
>
> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
> ---
> arch/arm/lib/cache.c | 28 ++++++++++++++++++++++++++++
> common/board_f.c | 28 ----------------------------
> 2 files changed, 28 insertions(+), 28 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 1/3] common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c
2020-03-29 17:57 ` [PATCH v2 1/3] common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c Ovidiu Panait
2020-03-30 23:56 ` Simon Glass
@ 2020-04-26 11:25 ` Tom Rini
1 sibling, 0 replies; 10+ messages in thread
From: Tom Rini @ 2020-04-26 11:25 UTC (permalink / raw)
To: u-boot
On Sun, Mar 29, 2020 at 08:57:39PM +0300, Ovidiu Panait wrote:
> Move the ARM-specific reserve_mmu definition from common/board_f.c
> to arch/arm/lib/cache.c.
>
> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
Applied to u-boot/master, thanks!
--
Tom
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/3] arm: asm/cache.c: Introduce arm_reserve_mmu
2020-03-29 17:57 [PATCH v2 0/3] common/board_f: Make reserve_mmu generic Ovidiu Panait
2020-03-29 17:57 ` [PATCH v2 1/3] common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c Ovidiu Panait
@ 2020-03-29 17:57 ` Ovidiu Panait
2020-03-30 23:57 ` Simon Glass
2020-04-26 11:26 ` Tom Rini
2020-03-29 17:57 ` [PATCH v2 3/3] common/board_f: Make reserve_mmu generic Ovidiu Panait
2 siblings, 2 replies; 10+ messages in thread
From: Ovidiu Panait @ 2020-03-29 17:57 UTC (permalink / raw)
To: u-boot
As a preparation for turning reserve_mmu into an arch-specific variant,
introduce arm_reserve_mmu on ARM. It implements the default routine for
reserving memory for MMU TLB and needs to be weakly defined in order to allow
for machines to override it.
Without this decoupling, after introducing arch_reserve_mmu, there would be two
weak definitions for it, one in common/board_f.c and one in
arch/arm/lib/cache.c.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
---
arch/arm/include/asm/cache.h | 11 +++++++++++
arch/arm/lib/cache.c | 5 +++++
arch/arm/mach-versal/cpu.c | 3 ++-
arch/arm/mach-zynqmp/cpu.c | 3 ++-
4 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index 950ec1e793..c20e05ec7f 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -49,4 +49,15 @@ void dram_bank_mmu_setup(int bank);
*/
#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
+/*
+ * arm_reserve_mmu() - Reserve memory for MMU TLB table
+ *
+ * Default implementation for reserving memory for MMU TLB table. It is used
+ * during generic board init sequence in common/board_f.c. Weakly defined, so
+ * that machines can override it if needed.
+ *
+ * Return: 0 if OK
+ */
+int arm_reserve_mmu(void);
+
#endif /* _ASM_CACHE_H */
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index b8e1e340a1..3cbed602eb 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -122,6 +122,11 @@ void invalidate_l2_cache(void)
#endif
__weak int reserve_mmu(void)
+{
+ return arm_reserve_mmu();
+}
+
+__weak int arm_reserve_mmu(void)
{
#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
/* reserve TLB table */
diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 6ee6cd43ec..c14c5bb39c 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -9,6 +9,7 @@
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
+#include <asm/cache.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -98,7 +99,7 @@ u64 get_page_table_size(void)
}
#if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU)
-int reserve_mmu(void)
+int arm_reserve_mmu(void)
{
tcm_init(TCM_LOCK);
gd->arch.tlb_size = PGTABLE_SIZE;
diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
index 442427bc11..811684a9f8 100644
--- a/arch/arm/mach-zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -11,6 +11,7 @@
#include <asm/armv8/mmu.h>
#include <asm/io.h>
#include <zynqmp_firmware.h>
+#include <asm/cache.h>
#define ZYNQ_SILICON_VER_MASK 0xF000
#define ZYNQ_SILICON_VER_SHIFT 12
@@ -116,7 +117,7 @@ void tcm_init(u8 mode)
#endif
#ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
-int reserve_mmu(void)
+int arm_reserve_mmu(void)
{
tcm_init(TCM_LOCK);
gd->arch.tlb_size = PGTABLE_SIZE;
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 2/3] arm: asm/cache.c: Introduce arm_reserve_mmu
2020-03-29 17:57 ` [PATCH v2 2/3] arm: asm/cache.c: Introduce arm_reserve_mmu Ovidiu Panait
@ 2020-03-30 23:57 ` Simon Glass
2020-04-26 11:26 ` Tom Rini
1 sibling, 0 replies; 10+ messages in thread
From: Simon Glass @ 2020-03-30 23:57 UTC (permalink / raw)
To: u-boot
Hi Ovidiu,
On Sun, 29 Mar 2020 at 11:59, Ovidiu Panait <ovpanait@gmail.com> wrote:
>
> As a preparation for turning reserve_mmu into an arch-specific variant,
> introduce arm_reserve_mmu on ARM. It implements the default routine for
> reserving memory for MMU TLB and needs to be weakly defined in order to allow
> for machines to override it.
>
> Without this decoupling, after introducing arch_reserve_mmu, there would be two
> weak definitions for it, one in common/board_f.c and one in
> arch/arm/lib/cache.c.
>
> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
> ---
> arch/arm/include/asm/cache.h | 11 +++++++++++
> arch/arm/lib/cache.c | 5 +++++
> arch/arm/mach-versal/cpu.c | 3 ++-
> arch/arm/mach-zynqmp/cpu.c | 3 ++-
> 4 files changed, 20 insertions(+), 2 deletions(-)
>
I'm not a fan of weak functions and here we have two layers of them.
But I'm not sure what else to suggest, other than a Kconfig to
enable/disable the generic arm_reserve_mmu().
Reviewed-by: Simon Glass <sjg@chromium.org>
> diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
> index 950ec1e793..c20e05ec7f 100644
> --- a/arch/arm/include/asm/cache.h
> +++ b/arch/arm/include/asm/cache.h
> @@ -49,4 +49,15 @@ void dram_bank_mmu_setup(int bank);
> */
> #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
>
> +/*
> + * arm_reserve_mmu() - Reserve memory for MMU TLB table
> + *
> + * Default implementation for reserving memory for MMU TLB table. It is used
> + * during generic board init sequence in common/board_f.c. Weakly defined, so
> + * that machines can override it if needed.
> + *
> + * Return: 0 if OK
> + */
> +int arm_reserve_mmu(void);
> +
> #endif /* _ASM_CACHE_H */
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
> index b8e1e340a1..3cbed602eb 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -122,6 +122,11 @@ void invalidate_l2_cache(void)
> #endif
>
> __weak int reserve_mmu(void)
> +{
> + return arm_reserve_mmu();
> +}
> +
> +__weak int arm_reserve_mmu(void)
> {
> #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
> /* reserve TLB table */
> diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
> index 6ee6cd43ec..c14c5bb39c 100644
> --- a/arch/arm/mach-versal/cpu.c
> +++ b/arch/arm/mach-versal/cpu.c
> @@ -9,6 +9,7 @@
> #include <asm/io.h>
> #include <asm/arch/hardware.h>
> #include <asm/arch/sys_proto.h>
> +#include <asm/cache.h>
>
> DECLARE_GLOBAL_DATA_PTR;
>
> @@ -98,7 +99,7 @@ u64 get_page_table_size(void)
> }
>
> #if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU)
> -int reserve_mmu(void)
> +int arm_reserve_mmu(void)
> {
> tcm_init(TCM_LOCK);
> gd->arch.tlb_size = PGTABLE_SIZE;
> diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
> index 442427bc11..811684a9f8 100644
> --- a/arch/arm/mach-zynqmp/cpu.c
> +++ b/arch/arm/mach-zynqmp/cpu.c
> @@ -11,6 +11,7 @@
> #include <asm/armv8/mmu.h>
> #include <asm/io.h>
> #include <zynqmp_firmware.h>
> +#include <asm/cache.h>
>
> #define ZYNQ_SILICON_VER_MASK 0xF000
> #define ZYNQ_SILICON_VER_SHIFT 12
> @@ -116,7 +117,7 @@ void tcm_init(u8 mode)
> #endif
>
> #ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
> -int reserve_mmu(void)
> +int arm_reserve_mmu(void)
> {
> tcm_init(TCM_LOCK);
> gd->arch.tlb_size = PGTABLE_SIZE;
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v2 2/3] arm: asm/cache.c: Introduce arm_reserve_mmu
2020-03-29 17:57 ` [PATCH v2 2/3] arm: asm/cache.c: Introduce arm_reserve_mmu Ovidiu Panait
2020-03-30 23:57 ` Simon Glass
@ 2020-04-26 11:26 ` Tom Rini
1 sibling, 0 replies; 10+ messages in thread
From: Tom Rini @ 2020-04-26 11:26 UTC (permalink / raw)
To: u-boot
On Sun, Mar 29, 2020 at 08:57:40PM +0300, Ovidiu Panait wrote:
> As a preparation for turning reserve_mmu into an arch-specific variant,
> introduce arm_reserve_mmu on ARM. It implements the default routine for
> reserving memory for MMU TLB and needs to be weakly defined in order to allow
> for machines to override it.
>
> Without this decoupling, after introducing arch_reserve_mmu, there would be two
> weak definitions for it, one in common/board_f.c and one in
> arch/arm/lib/cache.c.
>
> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
Applied to u-boot/master, thanks!
--
Tom
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 3/3] common/board_f: Make reserve_mmu generic
2020-03-29 17:57 [PATCH v2 0/3] common/board_f: Make reserve_mmu generic Ovidiu Panait
2020-03-29 17:57 ` [PATCH v2 1/3] common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c Ovidiu Panait
2020-03-29 17:57 ` [PATCH v2 2/3] arm: asm/cache.c: Introduce arm_reserve_mmu Ovidiu Panait
@ 2020-03-29 17:57 ` Ovidiu Panait
2020-03-30 23:57 ` Simon Glass
2020-04-26 11:26 ` Tom Rini
2 siblings, 2 replies; 10+ messages in thread
From: Ovidiu Panait @ 2020-03-29 17:57 UTC (permalink / raw)
To: u-boot
Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu
routines. Also, define a weak nop stub for it.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
---
arch/arm/lib/cache.c | 2 +-
common/board_f.c | 9 ++++++---
include/init.h | 13 ++++++++++++-
3 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 3cbed602eb..44dde26065 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -121,7 +121,7 @@ void invalidate_l2_cache(void)
}
#endif
-__weak int reserve_mmu(void)
+int arch_reserve_mmu(void)
{
return arm_reserve_mmu();
}
diff --git a/common/board_f.c b/common/board_f.c
index a88bd64630..52750dd307 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -385,6 +385,11 @@ static int reserve_round_4k(void)
return 0;
}
+__weak int arch_reserve_mmu(void)
+{
+ return 0;
+}
+
static int reserve_video(void)
{
#ifdef CONFIG_DM_VIDEO
@@ -942,9 +947,7 @@ static const init_fnc_t init_sequence_f[] = {
reserve_pram,
#endif
reserve_round_4k,
-#ifdef CONFIG_ARM
- reserve_mmu,
-#endif
+ arch_reserve_mmu,
reserve_video,
reserve_trace,
reserve_uboot,
diff --git a/include/init.h b/include/init.h
index 2a33a3fd1e..9ef88c966b 100644
--- a/include/init.h
+++ b/include/init.h
@@ -129,6 +129,18 @@ int testdram(void);
*/
int arch_reserve_stacks(void);
+/**
+ * arch_reserve_mmu() - Reserve memory for MMU TLB table
+ *
+ * Architecture-specific routine for reserving memory for the MMU TLB table.
+ * This is used in generic board init sequence in common/board_f.c.
+ *
+ * If an implementation is not provided, it will just be a nop stub.
+ *
+ * Return: 0 if OK
+ */
+int arch_reserve_mmu(void);
+
/**
* init_cache_f_r() - Turn on the cache in preparation for relocation
*
@@ -145,7 +157,6 @@ int init_cache_f_r(void);
int print_cpuinfo(void);
#endif
int timer_init(void);
-int reserve_mmu(void);
int misc_init_f(void);
#if defined(CONFIG_DTB_RESELECT)
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 3/3] common/board_f: Make reserve_mmu generic
2020-03-29 17:57 ` [PATCH v2 3/3] common/board_f: Make reserve_mmu generic Ovidiu Panait
@ 2020-03-30 23:57 ` Simon Glass
2020-04-26 11:26 ` Tom Rini
1 sibling, 0 replies; 10+ messages in thread
From: Simon Glass @ 2020-03-30 23:57 UTC (permalink / raw)
To: u-boot
On Sun, 29 Mar 2020 at 11:59, Ovidiu Panait <ovpanait@gmail.com> wrote:
>
> Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu
> routines. Also, define a weak nop stub for it.
>
> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
> ---
> arch/arm/lib/cache.c | 2 +-
> common/board_f.c | 9 ++++++---
> include/init.h | 13 ++++++++++++-
> 3 files changed, 19 insertions(+), 5 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
This series is very well put together, thank you.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 3/3] common/board_f: Make reserve_mmu generic
2020-03-29 17:57 ` [PATCH v2 3/3] common/board_f: Make reserve_mmu generic Ovidiu Panait
2020-03-30 23:57 ` Simon Glass
@ 2020-04-26 11:26 ` Tom Rini
1 sibling, 0 replies; 10+ messages in thread
From: Tom Rini @ 2020-04-26 11:26 UTC (permalink / raw)
To: u-boot
On Sun, Mar 29, 2020 at 08:57:41PM +0300, Ovidiu Panait wrote:
> Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu
> routines. Also, define a weak nop stub for it.
>
> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
Applied to u-boot/master, thanks!
--
Tom
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^ permalink raw reply [flat|nested] 10+ messages in thread