[PATCH v10 20/21] doc: riscv: Add documentation for Sipeed Maix Bit

Sean Anderson
2020-05-05T17:02:51Z

On 5/5/20 5:01 AM, Rick Chen wrote:
> Hi Sean
>
>> This patch adds documentation for the Sipeed Maix bit, and more generally
>> for the Kendryte K210 processor.
>>
>> Signed-off-by: Sean Anderson <seanga2@gmail.com>
>> ---
>>
>> Changes in v9:
>> - Mark dts code block as "none" explicitly
>> Changes in v7:
>> - Split off into its own patch
>> - Fix size of clint
>>
>> doc/board/index.rst | 1 +
>> doc/board/sipeed/index.rst | 9 ++
>> doc/board/sipeed/maix.rst | 298 +++++++++++++++++++++++++++++++++++++
>> 3 files changed, 308 insertions(+)
>> create mode 100644 doc/board/sipeed/index.rst
>> create mode 100644 doc/board/sipeed/maix.rst
>>
>
> The CI verification of v10 still fail, please check:
> https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/683207657
>
> Thanks,
> Rick

Hm, that's strange. I didn't see any of these errors when I ran CI.
Perhaps it is an interaction with one of the other patches merged. Is
it possible to get the u-boot.map file? The EPC address is present, but
without the map we can't tell what function caused the error.

--Sean