From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Thu, 7 May 2020 09:04:33 -0400 Subject: [PATCH] cache: l2x0: Fix missing write to Auxiliary Control Register In-Reply-To: <20200504104155.51123-1-ley.foon.tan@intel.com> References: <20200504104155.51123-1-ley.foon.tan@intel.com> Message-ID: <20200507130433.GF12564@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, May 04, 2020 at 06:41:55PM +0800, Ley Foon Tan wrote: > commit f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override > bit") > > Commit above removed writel to regs->pl310_aux_ctrl by accidentally, > restore it back. > > Signed-off-by: Ley Foon Tan Applied to u-boot/master, thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 659 bytes Desc: not available URL: