From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [PATCH v2 09/12] sysreset: Add Octeon sysreset driver
Date: Thu, 14 May 2020 11:59:09 +0200 [thread overview]
Message-ID: <20200514095912.14428-10-sr@denx.de> (raw)
In-Reply-To: <20200514095912.14428-1-sr@denx.de>
This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC
family.
Signed-off-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
drivers/sysreset/Kconfig | 7 ++++
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_octeon.c | 52 ++++++++++++++++++++++++++++++
3 files changed, 60 insertions(+)
create mode 100644 drivers/sysreset/sysreset_octeon.c
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 4be7433404..6ebc90e1d3 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -57,6 +57,13 @@ config SYSRESET_MICROBLAZE
help
This is soft reset on Microblaze which does jump to 0x0 address.
+config SYSRESET_OCTEON
+ bool "Enable support for Marvell Octeon SoC family"
+ depends on ARCH_OCTEON
+ help
+ This enables the system reset driver support for Marvell Octeon
+ SoCs.
+
config SYSRESET_PSCI
bool "Enable support for PSCI System Reset"
depends on ARM_PSCI_FW
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 3ed4bab9e3..df2293b848 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o
obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
+obj-$(CONFIG_SYSRESET_OCTEON) += sysreset_octeon.o
obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o
diff --git a/drivers/sysreset/sysreset_octeon.c b/drivers/sysreset/sysreset_octeon.c
new file mode 100644
index 0000000000..a05dac3226
--- /dev/null
+++ b/drivers/sysreset/sysreset_octeon.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Stefan Roese <sr@denx.de>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+
+#define RST_SOFT_RST 0x0080
+
+struct octeon_sysreset_data {
+ void __iomem *base;
+};
+
+static int octeon_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct octeon_sysreset_data *data = dev_get_priv(dev);
+
+ writeq(1, data->base + RST_SOFT_RST);
+
+ return -EINPROGRESS;
+}
+
+static int octeon_sysreset_probe(struct udevice *dev)
+{
+ struct octeon_sysreset_data *data = dev_get_priv(dev);
+
+ data->base = dev_remap_addr(dev);
+
+ return 0;
+}
+
+static struct sysreset_ops octeon_sysreset = {
+ .request = octeon_sysreset_request,
+};
+
+static const struct udevice_id octeon_sysreset_ids[] = {
+ { .compatible = "mrvl,cn7xxx-rst" },
+ { }
+};
+
+U_BOOT_DRIVER(sysreset_octeon) = {
+ .id = UCLASS_SYSRESET,
+ .name = "octeon_sysreset",
+ .priv_auto_alloc_size = sizeof(struct octeon_sysreset_data),
+ .ops = &octeon_sysreset,
+ .probe = octeon_sysreset_probe,
+ .of_match = octeon_sysreset_ids,
+};
--
2.26.2
next prev parent reply other threads:[~2020-05-14 9:59 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-14 9:59 [PATCH v2 00/12] mips: Add initial Octeon MIPS64 base support Stefan Roese
2020-05-14 9:59 ` [PATCH v2 01/12] mips: start.S: Add CONFIG_MIPS_INIT_JUMP_OFFSET Stefan Roese
2020-05-14 9:59 ` [PATCH v2 02/12] mips: start.S: Don't call mips_cache_reset() on ARCH_OCTEON Stefan Roese
2020-05-14 9:59 ` [PATCH v2 03/12] mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM Stefan Roese
2020-06-05 15:29 ` Daniel Schwierzeck
2020-05-14 9:59 ` [PATCH v2 04/12] mips: cache: Make flush_cache() weak to enable overwrite Stefan Roese
2020-06-05 15:29 ` Daniel Schwierzeck
2020-05-14 9:59 ` [PATCH v2 05/12] mips: time: Only compile the weak get_tbclk() when needed Stefan Roese
2020-06-05 15:29 ` Daniel Schwierzeck
2020-05-14 9:59 ` [PATCH v2 06/12] mips: traps: Set WG bit in EBase register on Octeon Stefan Roese
2020-06-05 15:30 ` Daniel Schwierzeck
2020-05-14 9:59 ` [PATCH v2 07/12] mips: mipsregs.h: Add more register macros for Octeon port Stefan Roese
2020-05-14 9:59 ` [PATCH v2 08/12] mips: mipsregs.h: Sync with linux v5.7.0-rc3 version Stefan Roese
2020-05-14 9:59 ` Stefan Roese [this message]
2020-05-14 9:59 ` [PATCH v2 10/12] mips: octeon: Initial minimal support for the Marvell Octeon SoC Stefan Roese
2020-06-16 17:42 ` Daniel Schwierzeck
2020-06-19 8:08 ` Stefan Roese
2020-05-14 9:59 ` [PATCH v2 11/12] mips: octeon: dts: Add Octeon 3 cn73xx base dtsi file Stefan Roese
2020-05-14 9:59 ` [PATCH v2 12/12] mips: octeon: Add minimal Octeon 3 EBB7304 EVK support Stefan Roese
2020-06-16 17:35 ` Daniel Schwierzeck
2020-06-19 8:06 ` Stefan Roese
2020-05-26 12:23 ` [PATCH v2 00/12] mips: Add initial Octeon MIPS64 base support Stefan Roese
2020-06-02 10:59 ` Stefan Roese
2020-06-05 15:40 ` Daniel Schwierzeck
2020-06-06 5:25 ` Stefan Roese
2020-06-15 7:49 ` Stefan Roese
2020-06-16 17:27 ` Daniel Schwierzeck
2020-06-19 7:51 ` Stefan Roese
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