From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [PATCH v2 11/12] mips: octeon: dts: Add Octeon 3 cn73xx base dtsi file
Date: Thu, 14 May 2020 11:59:11 +0200 [thread overview]
Message-ID: <20200514095912.14428-12-sr@denx.de> (raw)
In-Reply-To: <20200514095912.14428-1-sr@denx.de>
This patch adds the base dtsi file for the Octeon 3 cn73xx SoC.
Signed-off-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
MAINTAINERS | 1 +
arch/mips/dts/mrvl,cn73xx.dtsi | 64 ++++++++++++++++++++++++++++++++++
2 files changed, 65 insertions(+)
create mode 100644 arch/mips/dts/mrvl,cn73xx.dtsi
diff --git a/MAINTAINERS b/MAINTAINERS
index 7f4c325df4..15fd270762 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -757,6 +757,7 @@ M: Aaron Williams <awilliams@marvell.com>
S: Maintained
F: arch/mips/mach-octeon/
F: arch/mips/include/asm/arch-octeon/
+F: arch/mips/dts/mrvl,cn73xx.dtsi
MMC
M: Peng Fan <peng.fan@nxp.com>
diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi
new file mode 100644
index 0000000000..90872a3b4b
--- /dev/null
+++ b/arch/mips/dts/mrvl,cn73xx.dtsi
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Marvell / Cavium Inc. CN73xx
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ soc at 0 {
+ interrupt-parent = <&ciu3>;
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges; /* Direct mapping */
+
+ ciu3: interrupt-controller at 1010000000000 {
+ compatible = "cavium,octeon-7890-ciu3";
+ interrupt-controller;
+ /*
+ * Interrupts are specified by two parts:
+ * 1) Source number (20 significant bits)
+ * 2) Trigger type: (4 == level, 1 == edge)
+ */
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x10100 0x00000000 0x0 0xb0000000>;
+ };
+
+ bootbus: bootbus at 1180000000000 {
+ compatible = "cavium,octeon-3860-bootbus","simple-bus";
+ reg = <0x11800 0x00000000 0x0 0x200>;
+ /* The chip select number and offset */
+ #address-cells = <2>;
+ /* The size of the chip select region */
+ #size-cells = <1>;
+ };
+
+ reset: reset at 1180006001600 {
+ compatible = "mrvl,cn7xxx-rst";
+ reg = <0x11800 0x06001600 0x0 0x200>;
+ };
+
+ uart0: serial at 1180000000800 {
+ compatible = "cavium,octeon-3860-uart","ns16550";
+ reg = <0x11800 0x00000800 0x0 0x400>;
+ clock-frequency = <0>;
+ current-speed = <115200>;
+ reg-shift = <3>;
+ interrupts = <0x08000 4>;
+ };
+
+ uart1: serial at 1180000000c00 {
+ compatible = "cavium,octeon-3860-uart","ns16550";
+ reg = <0x11800 0x00000c00 0x0 0x400>;
+ clock-frequency = <0>;
+ current-speed = <115200>;
+ reg-shift = <3>;
+ interrupts = <0x08040 4>;
+ };
+ };
+};
--
2.26.2
next prev parent reply other threads:[~2020-05-14 9:59 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-14 9:59 [PATCH v2 00/12] mips: Add initial Octeon MIPS64 base support Stefan Roese
2020-05-14 9:59 ` [PATCH v2 01/12] mips: start.S: Add CONFIG_MIPS_INIT_JUMP_OFFSET Stefan Roese
2020-05-14 9:59 ` [PATCH v2 02/12] mips: start.S: Don't call mips_cache_reset() on ARCH_OCTEON Stefan Roese
2020-05-14 9:59 ` [PATCH v2 03/12] mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM Stefan Roese
2020-06-05 15:29 ` Daniel Schwierzeck
2020-05-14 9:59 ` [PATCH v2 04/12] mips: cache: Make flush_cache() weak to enable overwrite Stefan Roese
2020-06-05 15:29 ` Daniel Schwierzeck
2020-05-14 9:59 ` [PATCH v2 05/12] mips: time: Only compile the weak get_tbclk() when needed Stefan Roese
2020-06-05 15:29 ` Daniel Schwierzeck
2020-05-14 9:59 ` [PATCH v2 06/12] mips: traps: Set WG bit in EBase register on Octeon Stefan Roese
2020-06-05 15:30 ` Daniel Schwierzeck
2020-05-14 9:59 ` [PATCH v2 07/12] mips: mipsregs.h: Add more register macros for Octeon port Stefan Roese
2020-05-14 9:59 ` [PATCH v2 08/12] mips: mipsregs.h: Sync with linux v5.7.0-rc3 version Stefan Roese
2020-05-14 9:59 ` [PATCH v2 09/12] sysreset: Add Octeon sysreset driver Stefan Roese
2020-05-14 9:59 ` [PATCH v2 10/12] mips: octeon: Initial minimal support for the Marvell Octeon SoC Stefan Roese
2020-06-16 17:42 ` Daniel Schwierzeck
2020-06-19 8:08 ` Stefan Roese
2020-05-14 9:59 ` Stefan Roese [this message]
2020-05-14 9:59 ` [PATCH v2 12/12] mips: octeon: Add minimal Octeon 3 EBB7304 EVK support Stefan Roese
2020-06-16 17:35 ` Daniel Schwierzeck
2020-06-19 8:06 ` Stefan Roese
2020-05-26 12:23 ` [PATCH v2 00/12] mips: Add initial Octeon MIPS64 base support Stefan Roese
2020-06-02 10:59 ` Stefan Roese
2020-06-05 15:40 ` Daniel Schwierzeck
2020-06-06 5:25 ` Stefan Roese
2020-06-15 7:49 ` Stefan Roese
2020-06-16 17:27 ` Daniel Schwierzeck
2020-06-19 7:51 ` Stefan Roese
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