From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v11 18/21] riscv: Enable cpu clock if it is present
Date: Wed, 20 May 2020 02:41:08 -0400 [thread overview]
Message-ID: <20200520064111.317605-19-seanga2@gmail.com> (raw)
In-Reply-To: <20200520064111.317605-1-seanga2@gmail.com>
The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
This patch was previously submitted on its own as
https://patchwork.ozlabs.org/patch/1232420/
Changes in v4:
- New
drivers/cpu/riscv_cpu.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index 2d44d1c17b..76b0489d2a 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+ * Copyright (C) 2020, Sean Anderson <seanga2@gmail.com>
*/
#include <clk.h>
@@ -119,6 +120,24 @@ static int riscv_cpu_bind(struct udevice *dev)
return 0;
}
+static int riscv_cpu_probe(struct udevice *dev)
+{
+ int ret = 0;
+ struct clk clk;
+
+ /* Get a clock if it exists */
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret)
+ return 0;
+
+ ret = clk_enable(&clk);
+ clk_free(&clk);
+ if (ret == -ENOSYS || ret == -ENOTSUPP)
+ return 0;
+ else
+ return ret;
+}
+
static const struct cpu_ops riscv_cpu_ops = {
.get_desc = riscv_cpu_get_desc,
.get_info = riscv_cpu_get_info,
@@ -135,6 +154,7 @@ U_BOOT_DRIVER(riscv_cpu) = {
.id = UCLASS_CPU,
.of_match = riscv_cpu_ids,
.bind = riscv_cpu_bind,
+ .probe = riscv_cpu_probe,
.ops = &riscv_cpu_ops,
.flags = DM_FLAG_PRE_RELOC,
};
--
2.26.2
next prev parent reply other threads:[~2020-05-20 6:41 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-20 6:40 [PATCH v11 00/21] riscv: Add Sipeed Maix support Sean Anderson
2020-05-20 6:40 ` [PATCH v11 01/21] clk: Always use the supplied struct clk Sean Anderson
2020-05-20 6:40 ` [PATCH v11 02/21] clk: Check that ops of composite clock components exist before calling Sean Anderson
2020-05-20 6:40 ` [PATCH v11 03/21] clk: Unconditionally recursively en-/dis-able clocks Sean Anderson
2020-05-20 6:40 ` [PATCH v11 04/21] clk: Fix clk_get_by_* handling of index Sean Anderson
2020-05-20 6:40 ` [PATCH v11 05/21] clk: Add K210 pll support Sean Anderson
2020-05-20 6:40 ` [PATCH v11 06/21] clk: Add a bypass clock for K210 Sean Anderson
2020-05-20 6:40 ` [PATCH v11 07/21] clk: Add K210 clock support Sean Anderson
2020-05-20 6:40 ` [PATCH v11 08/21] dm: Add support for simple-pm-bus Sean Anderson
2020-05-20 6:40 ` [PATCH v11 09/21] dm: Fix error handling for dev_read_addr_ptr Sean Anderson
2020-05-20 6:41 ` [PATCH v11 10/21] reset: Add generic reset driver Sean Anderson
2020-05-20 6:41 ` [PATCH v11 11/21] lib: Always set errno in hcreate_r Sean Anderson
2020-05-20 6:41 ` [PATCH v11 12/21] riscv: Add headers for asm/global_data.h Sean Anderson
2020-05-20 6:41 ` [PATCH v11 13/21] riscv: Clear pending interrupts before enabling IPIs Sean Anderson
2020-05-20 6:41 ` [PATCH v11 14/21] riscv: Clean up IPI initialization code Sean Anderson
2020-05-20 7:52 ` Rick Chen
2020-05-20 6:41 ` [PATCH v11 15/21] riscv: Add option to support RISC-V privileged spec 1.9 Sean Anderson
2020-05-20 6:41 ` [PATCH v11 16/21] riscv: Allow use of reset drivers Sean Anderson
2020-05-20 6:41 ` [PATCH v11 17/21] riscv: Try to get cpu frequency from a "clocks" node if it exists Sean Anderson
2020-05-20 6:41 ` Sean Anderson [this message]
2020-05-20 6:41 ` [PATCH v11 19/21] riscv: Add device tree for K210 and Sipeed Maix BitM Sean Anderson
2020-05-20 6:41 ` [PATCH v11 20/21] doc: riscv: Add documentation for Sipeed Maix Bit Sean Anderson
2020-05-20 6:41 ` [PATCH v11 21/21] riscv: Add Sipeed Maix support Sean Anderson
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