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* [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement
@ 2020-06-11 11:03 Andre Przywara
  2020-06-11 11:03 ` [PATCH 1/7] arm: vexpress64: Fix counter frequency Andre Przywara
                   ` (6 more replies)
  0 siblings, 7 replies; 24+ messages in thread
From: Andre Przywara @ 2020-06-11 11:03 UTC (permalink / raw)
  To: u-boot

This updates the Arm Juno board to fix a small bug, enable DM_ETH and
also allow the usage of PCIe devices, foremost the on-board SATA
controller.

Patch 1/7 is a "typo" fix for the counter frequency.
Patch 2, 3 and 4 allow to use the smc911x driver with DM_ETH on the
Juno board, that removes the deprecation warning.
Patch 5 allows the sata_sil driver to be used with DM_PCI compliant
host controller drivers. Patch 6 tells U-Boot about the PCIe controller
on the two later revision Juno boards. So far we were initialising the
host bridge, to pave the way for any OS driver, but denied U-Boot itself
to use PCIe devices.
The final patch just enables the sata_sil driver, which allows loading
images from SATA hard drives connected to the on-board ports.

This allows me to boot an off-the-shelf Ubuntu installation using
Grub/EFI from an SSD.

Cheers,
Andre

Andre Przywara (7):
  arm: vexpress64: Fix counter frequency
  net: dm: Remove warning about EEPROM provided MAC address
  net: smc911x: Properly handle EEPROM MAC address
  arm: juno: Enable DM_ETH
  sata_sil: Enable DM_PCI operation
  arm: juno: Enable PCI
  arm: juno: Enable SATA controller

 arch/arm/Kconfig                       |  2 +-
 board/armltd/vexpress64/pcie.c         | 14 +++---
 board/armltd/vexpress64/vexpress64.c   |  2 +
 configs/vexpress_aemv8a_juno_defconfig | 10 ++++-
 drivers/ata/sata_sil.c                 | 11 ++++-
 drivers/ata/sata_sil.h                 |  6 ++-
 drivers/net/smc911x.c                  | 60 +++++++++++++++-----------
 include/configs/vexpress_aemv8a.h      |  2 +-
 net/eth-uclass.c                       |  2 -
 9 files changed, 72 insertions(+), 37 deletions(-)

-- 
2.17.5

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 1/7] arm: vexpress64: Fix counter frequency
  2020-06-11 11:03 [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement Andre Przywara
@ 2020-06-11 11:03 ` Andre Przywara
  2020-06-20 20:22   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  2020-06-11 11:03 ` [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address Andre Przywara
                   ` (5 subsequent siblings)
  6 siblings, 2 replies; 24+ messages in thread
From: Andre Przywara @ 2020-06-11 11:03 UTC (permalink / raw)
  To: u-boot

The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz
crystal oscillator, so the frequency is not 25165824 MHz, as the current
code suggests.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 include/configs/vexpress_aemv8a.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index 09cdd3dab5..e63c335f85 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -68,7 +68,7 @@
 #define V2M_SYS_CFGSTAT			(V2M_SYSREGS + 0x0a8)
 
 /* Generic Timer Definitions */
-#define COUNTER_FREQUENCY		(0x1800000)	/* 24MHz */
+#define COUNTER_FREQUENCY		24000000	/* 24MHz */
 
 /* Generic Interrupt Controller Definitions */
 #ifdef CONFIG_GICV3
-- 
2.17.5

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address
  2020-06-11 11:03 [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement Andre Przywara
  2020-06-11 11:03 ` [PATCH 1/7] arm: vexpress64: Fix counter frequency Andre Przywara
@ 2020-06-11 11:03 ` Andre Przywara
  2020-06-11 11:09   ` Ramon Fried
                     ` (2 more replies)
  2020-06-11 11:03 ` [PATCH 3/7] net: smc911x: Properly handle EEPROM " Andre Przywara
                   ` (4 subsequent siblings)
  6 siblings, 3 replies; 24+ messages in thread
From: Andre Przywara @ 2020-06-11 11:03 UTC (permalink / raw)
  To: u-boot

Similar to patch 821fec0ceb3e ("net: remove scary warning about EEPROM
provided MAC address") this removes the somewhat awkward "warning" on
boards using DM_ETH:
In many parts of the computing world having a unique MAC address
sitting in some on-NIC storage is considered the normal case.

If there is a properly provided MAC address (either from ROM or from DT),
remove the warning to not scare the user unnecessarily.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 net/eth-uclass.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 7f89f65c92..0d9b75a9a2 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -560,8 +560,6 @@ static int eth_post_probe(struct udevice *dev)
 		memcpy(pdata->enetaddr, env_enetaddr, ARP_HLEN);
 	} else if (is_valid_ethaddr(pdata->enetaddr)) {
 		eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
-		printf("\nWarning: %s using MAC address from %s\n",
-		       dev->name, source);
 	} else if (is_zero_ethaddr(pdata->enetaddr) ||
 		   !is_valid_ethaddr(pdata->enetaddr)) {
 #ifdef CONFIG_NET_RANDOM_ETHADDR
-- 
2.17.5

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 3/7] net: smc911x: Properly handle EEPROM MAC address
  2020-06-11 11:03 [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement Andre Przywara
  2020-06-11 11:03 ` [PATCH 1/7] arm: vexpress64: Fix counter frequency Andre Przywara
  2020-06-11 11:03 ` [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address Andre Przywara
@ 2020-06-11 11:03 ` Andre Przywara
  2020-06-11 11:10   ` Ramon Fried
                     ` (2 more replies)
  2020-06-11 11:03 ` [PATCH 4/7] arm: juno: Enable DM_ETH Andre Przywara
                   ` (3 subsequent siblings)
  6 siblings, 3 replies; 24+ messages in thread
From: Andre Przywara @ 2020-06-11 11:03 UTC (permalink / raw)
  To: u-boot

When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
address from the optional EEPROM storage, but failed to copy this to the
platdata struct. Since it was also missing a definition of the
read_rom_hwaddr() function, the generic Ethernet code was dismissing
this MAC address, falling back to a random address or denying to start
at all.

Add an implementation of .read_rom_hwaddr, and refactor the function
reading the ROM address to be called by all interested parties.

This fixes MAC address issues when using the driver in DM_ETH "mode".

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 drivers/net/smc911x.c | 60 ++++++++++++++++++++++++++-----------------
 1 file changed, 36 insertions(+), 24 deletions(-)

diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 9d2790e561..053ff9f4ff 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -187,6 +187,26 @@ static void smc911x_handle_mac_address(struct smc911x_priv *priv)
 	printf(DRIVERNAME ": MAC %pM\n", m);
 }
 
+static bool smc911x_read_mac_address(struct smc911x_priv *priv)
+{
+	u32 addrh, addrl;
+
+	/* address is obtained from optional eeprom */
+	addrh = smc911x_get_mac_csr(priv, ADDRH);
+	addrl = smc911x_get_mac_csr(priv, ADDRL);
+	if (addrl == 0xffffffff && addrh == 0x0000ffff)
+		return false;
+
+	priv->enetaddr[0] = addrl;
+	priv->enetaddr[1] = addrl >>  8;
+	priv->enetaddr[2] = addrl >> 16;
+	priv->enetaddr[3] = addrl >> 24;
+	priv->enetaddr[4] = addrh;
+	priv->enetaddr[5] = addrh >> 8;
+
+	return true;
+}
+
 static int smc911x_eth_phy_read(struct smc911x_priv *priv,
 				u8 phy, u8 reg, u16 *val)
 {
@@ -471,7 +491,6 @@ static int smc911x_recv(struct eth_device *dev)
 
 int smc911x_initialize(u8 dev_num, int base_addr)
 {
-	unsigned long addrl, addrh;
 	struct smc911x_priv *priv;
 	int ret;
 
@@ -489,18 +508,8 @@ int smc911x_initialize(u8 dev_num, int base_addr)
 		goto err_detect;
 	}
 
-	addrh = smc911x_get_mac_csr(priv, ADDRH);
-	addrl = smc911x_get_mac_csr(priv, ADDRL);
-	if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
-		/* address is obtained from optional eeprom */
-		priv->enetaddr[0] = addrl;
-		priv->enetaddr[1] = addrl >>  8;
-		priv->enetaddr[2] = addrl >> 16;
-		priv->enetaddr[3] = addrl >> 24;
-		priv->enetaddr[4] = addrh;
-		priv->enetaddr[5] = addrh >> 8;
+	if (smc911x_read_mac_address(priv))
 		memcpy(priv->dev.enetaddr, priv->enetaddr, 6);
-	}
 
 	priv->dev.init = smc911x_init;
 	priv->dev.halt = smc911x_halt;
@@ -565,6 +574,19 @@ static int smc911x_recv(struct udevice *dev, int flags, uchar **packetp)
 	return ret ? ret : -EAGAIN;
 }
 
+static int smc911x_read_rom_hwaddr(struct udevice *dev)
+{
+	struct smc911x_priv *priv = dev_get_priv(dev);
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+
+	if (!smc911x_read_mac_address(priv))
+		return -ENODEV;
+
+	memcpy(pdata->enetaddr, priv->enetaddr, sizeof(pdata->enetaddr));
+
+	return 0;
+}
+
 static int smc911x_bind(struct udevice *dev)
 {
 	return device_set_name(dev, dev->name);
@@ -573,7 +595,6 @@ static int smc911x_bind(struct udevice *dev)
 static int smc911x_probe(struct udevice *dev)
 {
 	struct smc911x_priv *priv = dev_get_priv(dev);
-	unsigned long addrh, addrl;
 	int ret;
 
 	/* Try to detect chip. Will fail if not present. */
@@ -581,17 +602,7 @@ static int smc911x_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
-	addrh = smc911x_get_mac_csr(priv, ADDRH);
-	addrl = smc911x_get_mac_csr(priv, ADDRL);
-	if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
-		/* address is obtained from optional eeprom */
-		priv->enetaddr[0] = addrl;
-		priv->enetaddr[1] = addrl >>  8;
-		priv->enetaddr[2] = addrl >> 16;
-		priv->enetaddr[3] = addrl >> 24;
-		priv->enetaddr[4] = addrh;
-		priv->enetaddr[5] = addrh >> 8;
-	}
+	smc911x_read_rom_hwaddr(dev);
 
 	return 0;
 }
@@ -612,6 +623,7 @@ static const struct eth_ops smc911x_ops = {
 	.send	= smc911x_send,
 	.recv	= smc911x_recv,
 	.stop	= smc911x_stop,
+	.read_rom_hwaddr = smc911x_read_rom_hwaddr,
 };
 
 static const struct udevice_id smc911x_ids[] = {
-- 
2.17.5

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 4/7] arm: juno: Enable DM_ETH
  2020-06-11 11:03 [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement Andre Przywara
                   ` (2 preceding siblings ...)
  2020-06-11 11:03 ` [PATCH 3/7] net: smc911x: Properly handle EEPROM " Andre Przywara
@ 2020-06-11 11:03 ` Andre Przywara
  2020-06-20 20:26   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  2020-06-11 11:03 ` [PATCH 5/7] sata_sil: Enable DM_PCI operation Andre Przywara
                   ` (2 subsequent siblings)
  6 siblings, 2 replies; 24+ messages in thread
From: Andre Przywara @ 2020-06-11 11:03 UTC (permalink / raw)
  To: u-boot

The smc911X driver is now DM enabled, so we can switch the Juno board
over to use DM_ETH for the on-board Fast Ethernet device.
Works out of the box by using the DT.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/Kconfig                     | 2 +-
 board/armltd/vexpress64/vexpress64.c | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 21df1c415f..09a819c5fa 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1169,7 +1169,7 @@ config TARGET_VEXPRESS64_JUNO
 	select DM_SERIAL
 	select ARM_PSCI_FW
 	select PSCI_RESET
-	select DM
+	select DM_ETH
 	select BLK
 	select USB
 	select DM_USB
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c
index fbfa7a18f1..5932a4a0c7 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -152,11 +152,13 @@ void reset_cpu(ulong addr)
 int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
+#ifndef CONFIG_DM_ETH
 #ifdef CONFIG_SMC91111
 	rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
 #endif
 #ifdef CONFIG_SMC911X
 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
 #endif
 	return rc;
 }
-- 
2.17.5

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 5/7] sata_sil: Enable DM_PCI operation
  2020-06-11 11:03 [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement Andre Przywara
                   ` (3 preceding siblings ...)
  2020-06-11 11:03 ` [PATCH 4/7] arm: juno: Enable DM_ETH Andre Przywara
@ 2020-06-11 11:03 ` Andre Przywara
  2020-06-20 20:27   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  2020-06-11 11:03 ` [PATCH 6/7] arm: juno: Enable PCI Andre Przywara
  2020-06-11 11:03 ` [PATCH 7/7] arm: juno: Enable SATA controller Andre Przywara
  6 siblings, 2 replies; 24+ messages in thread
From: Andre Przywara @ 2020-06-11 11:03 UTC (permalink / raw)
  To: u-boot

Even though the sata_sil driver was converted over to the driver model,
it still assumed that the PCI controller is using the legacy interface.

Allow the "devno" member to be a struct udevice pointer and use
DM_PCI_COMPAT to covert the rest of the interface.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 drivers/ata/sata_sil.c | 11 ++++++++++-
 drivers/ata/sata_sil.h |  6 +++++-
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 6896fa8771..d5ba94c172 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -27,7 +27,11 @@
 
 #include "sata_sil.h"
 
+#ifdef CONFIG_DM_PCI
+#define virt_to_bus(devno, v)	dm_pci_virt_to_mem(devno, (void *) (v))
+#else
 #define virt_to_bus(devno, v)	pci_virt_to_mem(devno, (void *) (v))
+#endif
 
 /* just compatible ahci_ops */
 struct sil_ops {
@@ -608,13 +612,18 @@ static int sil_init_sata(struct udevice *uc_dev, int dev)
 	/* Save the private struct to block device struct */
 #if !CONFIG_IS_ENABLED(BLK)
 	sata_dev_desc[dev].priv = (void *)sata;
+	sata->devno = sata_info.devno;
 #else
 	priv->sil_sata_desc[dev] = sata;
 	priv->port_num = dev;
+#ifdef CONFIG_DM_PCI
+	sata->devno = uc_dev->parent;
+#else
+	sata->devno = sata_info.devno;
+#endif	/* CONFIG_DM_PCI */
 #endif
 	sata->id = dev;
 	sata->port = port;
-	sata->devno = sata_info.devno;
 	sprintf(sata->name, "SATA#%d", dev);
 	sil_cmd_soft_reset(sata);
 	tmp = readl(port + PORT_SSTATUS);
diff --git a/drivers/ata/sata_sil.h b/drivers/ata/sata_sil.h
index ef41e8259a..a300c0c388 100644
--- a/drivers/ata/sata_sil.h
+++ b/drivers/ata/sata_sil.h
@@ -21,7 +21,11 @@ struct sil_sata {
 	u16		pio;
 	u16		mwdma;
 	u16		udma;
-	pci_dev_t devno;
+#ifdef CONFIG_DM_PCI
+	struct udevice	*devno;
+#else
+	pci_dev_t	devno;
+#endif
 	int		wcache;
 	int		flush;
 	int		flush_ext;
-- 
2.17.5

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 6/7] arm: juno: Enable PCI
  2020-06-11 11:03 [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement Andre Przywara
                   ` (4 preceding siblings ...)
  2020-06-11 11:03 ` [PATCH 5/7] sata_sil: Enable DM_PCI operation Andre Przywara
@ 2020-06-11 11:03 ` Andre Przywara
  2020-06-20 20:28   ` Linus Walleij
  2020-07-08  3:05   ` Tom Rini
  2020-06-11 11:03 ` [PATCH 7/7] arm: juno: Enable SATA controller Andre Przywara
  6 siblings, 2 replies; 24+ messages in thread
From: Andre Przywara @ 2020-06-11 11:03 UTC (permalink / raw)
  To: u-boot

The ARM Juno boards in their -r1 and -r2 variants sport a PCIe
controller, which we configure already in board specific code to be ECAM
compliant. Hence we can just enable the generic ECAM driver to let
U-Boot use PCIe devices.

Add the respective options to the Juno defconfig to enable the PCI
framework and the generic ECAM driver, and initialise the driver upon
loading U-Boot.

Make some functions in the Juno PCIe init code static on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 board/armltd/vexpress64/pcie.c         | 14 +++++++++-----
 configs/vexpress_aemv8a_juno_defconfig |  5 +++++
 2 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c
index 02de58b360..733b190e59 100644
--- a/board/armltd/vexpress64/pcie.c
+++ b/board/armltd/vexpress64/pcie.c
@@ -72,9 +72,9 @@
 					 JUNO_RESET_STATUS_PHY | \
 					 JUNO_RESET_STATUS_RC)
 
-void xr3pci_set_atr_entry(unsigned long base, unsigned long src_addr,
-			unsigned long trsl_addr, int window_size,
-			int trsl_param)
+static void xr3pci_set_atr_entry(unsigned long base, unsigned long src_addr,
+				 unsigned long trsl_addr, int window_size,
+				 int trsl_param)
 {
 	/* X3PCI_ATR_SRC_ADDR_LOW:
 	     - bit 0: enable entry,
@@ -94,7 +94,7 @@ void xr3pci_set_atr_entry(unsigned long base, unsigned long src_addr,
 	       ((u64)1) << window_size, trsl_param);
 }
 
-void xr3pci_setup_atr(void)
+static void xr3pci_setup_atr(void)
 {
 	/* setup PCIe to CPU address translation tables */
 	unsigned long base = XR3_CONFIG_BASE + XR3PCI_ATR_PCIE_WIN0;
@@ -141,7 +141,7 @@ void xr3pci_setup_atr(void)
 			     XR3_PCI_MEMSPACE64_SIZE, XR3PCI_ATR_TRSLID_PCIE_MEMORY);
 }
 
-void xr3pci_init(void)
+static void xr3pci_init(void)
 {
 	u32 val;
 	int timeout = 200;
@@ -193,5 +193,9 @@ void xr3pci_init(void)
 
 void vexpress64_pcie_init(void)
 {
+	/* Initialise and configure the PCIe host bridge. */
 	xr3pci_init();
+
+	/* Register the now ECAM complaint PCIe host controller with U-Boot. */
+	pci_init();
 }
diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index 49acb34310..4866a0e9d5 100644
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -32,6 +32,11 @@ CONFIG_CMD_UBI=y
 # CONFIG_ISO_PARTITION is not set
 # CONFIG_EFI_PARTITION is not set
 CONFIG_OF_BOARD=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_PCIE_ECAM_GENERIC=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_CMD_PCI=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xBFC0000
 # CONFIG_MMC is not set
-- 
2.17.5

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 7/7] arm: juno: Enable SATA controller
  2020-06-11 11:03 [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement Andre Przywara
                   ` (5 preceding siblings ...)
  2020-06-11 11:03 ` [PATCH 6/7] arm: juno: Enable PCI Andre Przywara
@ 2020-06-11 11:03 ` Andre Przywara
  2020-06-20 20:28   ` Linus Walleij
  2020-07-08  3:05   ` Tom Rini
  6 siblings, 2 replies; 24+ messages in thread
From: Andre Przywara @ 2020-06-11 11:03 UTC (permalink / raw)
  To: u-boot

The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe
SATA controller soldered on the board, providing two SATA ports.

Enable the driver and the sata command in the defconfig, to be able to
load images from SATA disks.

Tested by loading kernels and Grub/EFI from an SSD and successfully
booting a Linux system (with and without using UEFI).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 configs/vexpress_aemv8a_juno_defconfig | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index 4866a0e9d5..4654c529e8 100644
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -29,14 +29,15 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_UBI=y
-# CONFIG_ISO_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
 CONFIG_OF_BOARD=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_PCIE_ECAM_GENERIC=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_CMD_PCI=y
+CONFIG_LIBATA=y
+CONFIG_SATA_SIL=y
+CONFIG_CMD_SATA=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xBFC0000
 # CONFIG_MMC is not set
-- 
2.17.5

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address
  2020-06-11 11:03 ` [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address Andre Przywara
@ 2020-06-11 11:09   ` Ramon Fried
  2020-06-20 20:23   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  2 siblings, 0 replies; 24+ messages in thread
From: Ramon Fried @ 2020-06-11 11:09 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 2:05 PM Andre Przywara <andre.przywara@arm.com> wrote:
>
> Similar to patch 821fec0ceb3e ("net: remove scary warning about EEPROM
> provided MAC address") this removes the somewhat awkward "warning" on
> boards using DM_ETH:
> In many parts of the computing world having a unique MAC address
> sitting in some on-NIC storage is considered the normal case.
>
> If there is a properly provided MAC address (either from ROM or from DT),
> remove the warning to not scare the user unnecessarily.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  net/eth-uclass.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/net/eth-uclass.c b/net/eth-uclass.c
> index 7f89f65c92..0d9b75a9a2 100644
> --- a/net/eth-uclass.c
> +++ b/net/eth-uclass.c
> @@ -560,8 +560,6 @@ static int eth_post_probe(struct udevice *dev)
>                 memcpy(pdata->enetaddr, env_enetaddr, ARP_HLEN);
>         } else if (is_valid_ethaddr(pdata->enetaddr)) {
>                 eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
> -               printf("\nWarning: %s using MAC address from %s\n",
> -                      dev->name, source);
>         } else if (is_zero_ethaddr(pdata->enetaddr) ||
>                    !is_valid_ethaddr(pdata->enetaddr)) {
>  #ifdef CONFIG_NET_RANDOM_ETHADDR
> --
> 2.17.5
>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 3/7] net: smc911x: Properly handle EEPROM MAC address
  2020-06-11 11:03 ` [PATCH 3/7] net: smc911x: Properly handle EEPROM " Andre Przywara
@ 2020-06-11 11:10   ` Ramon Fried
  2020-06-20 20:25   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  2 siblings, 0 replies; 24+ messages in thread
From: Ramon Fried @ 2020-06-11 11:10 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 2:05 PM Andre Przywara <andre.przywara@arm.com> wrote:
>
> When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
> address from the optional EEPROM storage, but failed to copy this to the
> platdata struct. Since it was also missing a definition of the
> read_rom_hwaddr() function, the generic Ethernet code was dismissing
> this MAC address, falling back to a random address or denying to start
> at all.
>
> Add an implementation of .read_rom_hwaddr, and refactor the function
> reading the ROM address to be called by all interested parties.
>
> This fixes MAC address issues when using the driver in DM_ETH "mode".
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  drivers/net/smc911x.c | 60 ++++++++++++++++++++++++++-----------------
>  1 file changed, 36 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
> index 9d2790e561..053ff9f4ff 100644
> --- a/drivers/net/smc911x.c
> +++ b/drivers/net/smc911x.c
> @@ -187,6 +187,26 @@ static void smc911x_handle_mac_address(struct smc911x_priv *priv)
>         printf(DRIVERNAME ": MAC %pM\n", m);
>  }
>
> +static bool smc911x_read_mac_address(struct smc911x_priv *priv)
> +{
> +       u32 addrh, addrl;
> +
> +       /* address is obtained from optional eeprom */
> +       addrh = smc911x_get_mac_csr(priv, ADDRH);
> +       addrl = smc911x_get_mac_csr(priv, ADDRL);
> +       if (addrl == 0xffffffff && addrh == 0x0000ffff)
> +               return false;
> +
> +       priv->enetaddr[0] = addrl;
> +       priv->enetaddr[1] = addrl >>  8;
> +       priv->enetaddr[2] = addrl >> 16;
> +       priv->enetaddr[3] = addrl >> 24;
> +       priv->enetaddr[4] = addrh;
> +       priv->enetaddr[5] = addrh >> 8;
> +
> +       return true;
> +}
> +
>  static int smc911x_eth_phy_read(struct smc911x_priv *priv,
>                                 u8 phy, u8 reg, u16 *val)
>  {
> @@ -471,7 +491,6 @@ static int smc911x_recv(struct eth_device *dev)
>
>  int smc911x_initialize(u8 dev_num, int base_addr)
>  {
> -       unsigned long addrl, addrh;
>         struct smc911x_priv *priv;
>         int ret;
>
> @@ -489,18 +508,8 @@ int smc911x_initialize(u8 dev_num, int base_addr)
>                 goto err_detect;
>         }
>
> -       addrh = smc911x_get_mac_csr(priv, ADDRH);
> -       addrl = smc911x_get_mac_csr(priv, ADDRL);
> -       if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
> -               /* address is obtained from optional eeprom */
> -               priv->enetaddr[0] = addrl;
> -               priv->enetaddr[1] = addrl >>  8;
> -               priv->enetaddr[2] = addrl >> 16;
> -               priv->enetaddr[3] = addrl >> 24;
> -               priv->enetaddr[4] = addrh;
> -               priv->enetaddr[5] = addrh >> 8;
> +       if (smc911x_read_mac_address(priv))
>                 memcpy(priv->dev.enetaddr, priv->enetaddr, 6);
> -       }
>
>         priv->dev.init = smc911x_init;
>         priv->dev.halt = smc911x_halt;
> @@ -565,6 +574,19 @@ static int smc911x_recv(struct udevice *dev, int flags, uchar **packetp)
>         return ret ? ret : -EAGAIN;
>  }
>
> +static int smc911x_read_rom_hwaddr(struct udevice *dev)
> +{
> +       struct smc911x_priv *priv = dev_get_priv(dev);
> +       struct eth_pdata *pdata = dev_get_platdata(dev);
> +
> +       if (!smc911x_read_mac_address(priv))
> +               return -ENODEV;
> +
> +       memcpy(pdata->enetaddr, priv->enetaddr, sizeof(pdata->enetaddr));
> +
> +       return 0;
> +}
> +
>  static int smc911x_bind(struct udevice *dev)
>  {
>         return device_set_name(dev, dev->name);
> @@ -573,7 +595,6 @@ static int smc911x_bind(struct udevice *dev)
>  static int smc911x_probe(struct udevice *dev)
>  {
>         struct smc911x_priv *priv = dev_get_priv(dev);
> -       unsigned long addrh, addrl;
>         int ret;
>
>         /* Try to detect chip. Will fail if not present. */
> @@ -581,17 +602,7 @@ static int smc911x_probe(struct udevice *dev)
>         if (ret)
>                 return ret;
>
> -       addrh = smc911x_get_mac_csr(priv, ADDRH);
> -       addrl = smc911x_get_mac_csr(priv, ADDRL);
> -       if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
> -               /* address is obtained from optional eeprom */
> -               priv->enetaddr[0] = addrl;
> -               priv->enetaddr[1] = addrl >>  8;
> -               priv->enetaddr[2] = addrl >> 16;
> -               priv->enetaddr[3] = addrl >> 24;
> -               priv->enetaddr[4] = addrh;
> -               priv->enetaddr[5] = addrh >> 8;
> -       }
> +       smc911x_read_rom_hwaddr(dev);
>
>         return 0;
>  }
> @@ -612,6 +623,7 @@ static const struct eth_ops smc911x_ops = {
>         .send   = smc911x_send,
>         .recv   = smc911x_recv,
>         .stop   = smc911x_stop,
> +       .read_rom_hwaddr = smc911x_read_rom_hwaddr,
>  };
>
>  static const struct udevice_id smc911x_ids[] = {
> --
> 2.17.5
>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 1/7] arm: vexpress64: Fix counter frequency
  2020-06-11 11:03 ` [PATCH 1/7] arm: vexpress64: Fix counter frequency Andre Przywara
@ 2020-06-20 20:22   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Linus Walleij @ 2020-06-20 20:22 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 1:04 PM Andre Przywara <andre.przywara@arm.com> wrote:

> The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz
> crystal oscillator, so the frequency is not 25165824 MHz, as the current
> code suggests.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address
  2020-06-11 11:03 ` [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address Andre Przywara
  2020-06-11 11:09   ` Ramon Fried
@ 2020-06-20 20:23   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  2 siblings, 0 replies; 24+ messages in thread
From: Linus Walleij @ 2020-06-20 20:23 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 1:04 PM Andre Przywara <andre.przywara@arm.com> wrote:

> Similar to patch 821fec0ceb3e ("net: remove scary warning about EEPROM
> provided MAC address") this removes the somewhat awkward "warning" on
> boards using DM_ETH:
> In many parts of the computing world having a unique MAC address
> sitting in some on-NIC storage is considered the normal case.
>
> If there is a properly provided MAC address (either from ROM or from DT),
> remove the warning to not scare the user unnecessarily.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 3/7] net: smc911x: Properly handle EEPROM MAC address
  2020-06-11 11:03 ` [PATCH 3/7] net: smc911x: Properly handle EEPROM " Andre Przywara
  2020-06-11 11:10   ` Ramon Fried
@ 2020-06-20 20:25   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  2 siblings, 0 replies; 24+ messages in thread
From: Linus Walleij @ 2020-06-20 20:25 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 1:04 PM Andre Przywara <andre.przywara@arm.com> wrote:

> When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
> address from the optional EEPROM storage, but failed to copy this to the
> platdata struct. Since it was also missing a definition of the
> read_rom_hwaddr() function, the generic Ethernet code was dismissing
> this MAC address, falling back to a random address or denying to start
> at all.
>
> Add an implementation of .read_rom_hwaddr, and refactor the function
> reading the ROM address to be called by all interested parties.
>
> This fixes MAC address issues when using the driver in DM_ETH "mode".
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Oups. That explains why the ethernet addresses were looking
so funny at times.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 4/7] arm: juno: Enable DM_ETH
  2020-06-11 11:03 ` [PATCH 4/7] arm: juno: Enable DM_ETH Andre Przywara
@ 2020-06-20 20:26   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Linus Walleij @ 2020-06-20 20:26 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 1:04 PM Andre Przywara <andre.przywara@arm.com> wrote:

> The smc911X driver is now DM enabled, so we can switch the Juno board
> over to use DM_ETH for the on-board Fast Ethernet device.
> Works out of the box by using the DT.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 5/7] sata_sil: Enable DM_PCI operation
  2020-06-11 11:03 ` [PATCH 5/7] sata_sil: Enable DM_PCI operation Andre Przywara
@ 2020-06-20 20:27   ` Linus Walleij
  2020-07-08  3:04   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Linus Walleij @ 2020-06-20 20:27 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 1:04 PM Andre Przywara <andre.przywara@arm.com> wrote:

> Even though the sata_sil driver was converted over to the driver model,
> it still assumed that the PCI controller is using the legacy interface.
>
> Allow the "devno" member to be a struct udevice pointer and use
> DM_PCI_COMPAT to covert the rest of the interface.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 6/7] arm: juno: Enable PCI
  2020-06-11 11:03 ` [PATCH 6/7] arm: juno: Enable PCI Andre Przywara
@ 2020-06-20 20:28   ` Linus Walleij
  2020-07-08  3:05   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Linus Walleij @ 2020-06-20 20:28 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 1:04 PM Andre Przywara <andre.przywara@arm.com> wrote:

> The ARM Juno boards in their -r1 and -r2 variants sport a PCIe
> controller, which we configure already in board specific code to be ECAM
> compliant. Hence we can just enable the generic ECAM driver to let
> U-Boot use PCIe devices.
>
> Add the respective options to the Juno defconfig to enable the PCI
> framework and the generic ECAM driver, and initialise the driver upon
> loading U-Boot.
>
> Make some functions in the Juno PCIe init code static on the way.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Excellent!
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 7/7] arm: juno: Enable SATA controller
  2020-06-11 11:03 ` [PATCH 7/7] arm: juno: Enable SATA controller Andre Przywara
@ 2020-06-20 20:28   ` Linus Walleij
  2020-07-08  3:05   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Linus Walleij @ 2020-06-20 20:28 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 1:04 PM Andre Przywara <andre.przywara@arm.com> wrote:

> The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe
> SATA controller soldered on the board, providing two SATA ports.
>
> Enable the driver and the sata command in the defconfig, to be able to
> load images from SATA disks.
>
> Tested by loading kernels and Grub/EFI from an SSD and successfully
> booting a Linux system (with and without using UEFI).
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Nice!!
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 1/7] arm: vexpress64: Fix counter frequency
  2020-06-11 11:03 ` [PATCH 1/7] arm: vexpress64: Fix counter frequency Andre Przywara
  2020-06-20 20:22   ` Linus Walleij
@ 2020-07-08  3:04   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Tom Rini @ 2020-07-08  3:04 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 12:03:15PM +0100, Andre Przywara wrote:

> The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz
> crystal oscillator, so the frequency is not 25165824 MHz, as the current
> code suggests.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Applied to u-boot/master, thanks!

-- 
Tom
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^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address
  2020-06-11 11:03 ` [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address Andre Przywara
  2020-06-11 11:09   ` Ramon Fried
  2020-06-20 20:23   ` Linus Walleij
@ 2020-07-08  3:04   ` Tom Rini
  2 siblings, 0 replies; 24+ messages in thread
From: Tom Rini @ 2020-07-08  3:04 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 12:03:16PM +0100, Andre Przywara wrote:

> Similar to patch 821fec0ceb3e ("net: remove scary warning about EEPROM
> provided MAC address") this removes the somewhat awkward "warning" on
> boards using DM_ETH:
> In many parts of the computing world having a unique MAC address
> sitting in some on-NIC storage is considered the normal case.
> 
> If there is a properly provided MAC address (either from ROM or from DT),
> remove the warning to not scare the user unnecessarily.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Applied to u-boot/master, thanks!

-- 
Tom
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^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 3/7] net: smc911x: Properly handle EEPROM MAC address
  2020-06-11 11:03 ` [PATCH 3/7] net: smc911x: Properly handle EEPROM " Andre Przywara
  2020-06-11 11:10   ` Ramon Fried
  2020-06-20 20:25   ` Linus Walleij
@ 2020-07-08  3:04   ` Tom Rini
  2 siblings, 0 replies; 24+ messages in thread
From: Tom Rini @ 2020-07-08  3:04 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 12:03:17PM +0100, Andre Przywara wrote:

> When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
> address from the optional EEPROM storage, but failed to copy this to the
> platdata struct. Since it was also missing a definition of the
> read_rom_hwaddr() function, the generic Ethernet code was dismissing
> this MAC address, falling back to a random address or denying to start
> at all.
> 
> Add an implementation of .read_rom_hwaddr, and refactor the function
> reading the ROM address to be called by all interested parties.
> 
> This fixes MAC address issues when using the driver in DM_ETH "mode".
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Applied to u-boot/master, thanks!

-- 
Tom
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^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 4/7] arm: juno: Enable DM_ETH
  2020-06-11 11:03 ` [PATCH 4/7] arm: juno: Enable DM_ETH Andre Przywara
  2020-06-20 20:26   ` Linus Walleij
@ 2020-07-08  3:04   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Tom Rini @ 2020-07-08  3:04 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 12:03:18PM +0100, Andre Przywara wrote:

> The smc911X driver is now DM enabled, so we can switch the Juno board
> over to use DM_ETH for the on-board Fast Ethernet device.
> Works out of the box by using the DT.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Applied to u-boot/master, thanks!

-- 
Tom
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^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 5/7] sata_sil: Enable DM_PCI operation
  2020-06-11 11:03 ` [PATCH 5/7] sata_sil: Enable DM_PCI operation Andre Przywara
  2020-06-20 20:27   ` Linus Walleij
@ 2020-07-08  3:04   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Tom Rini @ 2020-07-08  3:04 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 12:03:19PM +0100, Andre Przywara wrote:

> Even though the sata_sil driver was converted over to the driver model,
> it still assumed that the PCI controller is using the legacy interface.
> 
> Allow the "devno" member to be a struct udevice pointer and use
> DM_PCI_COMPAT to covert the rest of the interface.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Applied to u-boot/master, thanks!

-- 
Tom
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^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 6/7] arm: juno: Enable PCI
  2020-06-11 11:03 ` [PATCH 6/7] arm: juno: Enable PCI Andre Przywara
  2020-06-20 20:28   ` Linus Walleij
@ 2020-07-08  3:05   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Tom Rini @ 2020-07-08  3:05 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 12:03:20PM +0100, Andre Przywara wrote:

> The ARM Juno boards in their -r1 and -r2 variants sport a PCIe
> controller, which we configure already in board specific code to be ECAM
> compliant. Hence we can just enable the generic ECAM driver to let
> U-Boot use PCIe devices.
> 
> Add the respective options to the Juno defconfig to enable the PCI
> framework and the generic ECAM driver, and initialise the driver upon
> loading U-Boot.
> 
> Make some functions in the Juno PCIe init code static on the way.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Applied to u-boot/master, thanks!

-- 
Tom
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^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 7/7] arm: juno: Enable SATA controller
  2020-06-11 11:03 ` [PATCH 7/7] arm: juno: Enable SATA controller Andre Przywara
  2020-06-20 20:28   ` Linus Walleij
@ 2020-07-08  3:05   ` Tom Rini
  1 sibling, 0 replies; 24+ messages in thread
From: Tom Rini @ 2020-07-08  3:05 UTC (permalink / raw)
  To: u-boot

On Thu, Jun 11, 2020 at 12:03:21PM +0100, Andre Przywara wrote:

> The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe
> SATA controller soldered on the board, providing two SATA ports.
> 
> Enable the driver and the sata command in the defconfig, to be able to
> load images from SATA disks.
> 
> Tested by loading kernels and Grub/EFI from an SSD and successfully
> booting a Linux system (with and without using UEFI).
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Applied to u-boot/master, thanks!

-- 
Tom
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^ permalink raw reply	[flat|nested] 24+ messages in thread

end of thread, other threads:[~2020-07-08  3:05 UTC | newest]

Thread overview: 24+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-06-11 11:03 [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement Andre Przywara
2020-06-11 11:03 ` [PATCH 1/7] arm: vexpress64: Fix counter frequency Andre Przywara
2020-06-20 20:22   ` Linus Walleij
2020-07-08  3:04   ` Tom Rini
2020-06-11 11:03 ` [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address Andre Przywara
2020-06-11 11:09   ` Ramon Fried
2020-06-20 20:23   ` Linus Walleij
2020-07-08  3:04   ` Tom Rini
2020-06-11 11:03 ` [PATCH 3/7] net: smc911x: Properly handle EEPROM " Andre Przywara
2020-06-11 11:10   ` Ramon Fried
2020-06-20 20:25   ` Linus Walleij
2020-07-08  3:04   ` Tom Rini
2020-06-11 11:03 ` [PATCH 4/7] arm: juno: Enable DM_ETH Andre Przywara
2020-06-20 20:26   ` Linus Walleij
2020-07-08  3:04   ` Tom Rini
2020-06-11 11:03 ` [PATCH 5/7] sata_sil: Enable DM_PCI operation Andre Przywara
2020-06-20 20:27   ` Linus Walleij
2020-07-08  3:04   ` Tom Rini
2020-06-11 11:03 ` [PATCH 6/7] arm: juno: Enable PCI Andre Przywara
2020-06-20 20:28   ` Linus Walleij
2020-07-08  3:05   ` Tom Rini
2020-06-11 11:03 ` [PATCH 7/7] arm: juno: Enable SATA controller Andre Przywara
2020-06-20 20:28   ` Linus Walleij
2020-07-08  3:05   ` Tom Rini

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