From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Date: Wed, 8 Jul 2020 15:35:22 +0530 Subject: [PATCH v2 1/7] arm64: dts: rockchip: Sync v5.7-rc1 rk3399pro.dtsi In-Reply-To: <20200708100528.419035-1-jagan@amarulasolutions.com> References: <20200708100528.419035-1-jagan@amarulasolutions.com> Message-ID: <20200708100528.419035-2-jagan@amarulasolutions.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Sync linux-next v5.7-rc1 rk3399pro.dtsi. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- arch/arm/dts/rk3399pro.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 arch/arm/dts/rk3399pro.dtsi diff --git a/arch/arm/dts/rk3399pro.dtsi b/arch/arm/dts/rk3399pro.dtsi new file mode 100644 index 0000000000..bb5ebf6608 --- /dev/null +++ b/arch/arm/dts/rk3399pro.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. + +#include "rk3399.dtsi" + +/ { + compatible = "rockchip,rk3399pro"; +}; + +/* Default to enabled since AP talk to NPU part over pcie */ +&pcie_phy { + status = "okay"; +}; + +/* Default to enabled since AP talk to NPU part over pcie */ +&pcie0 { + ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; + num-lanes = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn_cpm>; + status = "okay"; +}; -- 2.25.1