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From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH 5/6] riscv: Update Kendryte device tree for new CLINT driver
Date: Wed, 22 Jul 2020 11:51:09 -0400	[thread overview]
Message-ID: <20200722155110.713966-6-seanga2@gmail.com> (raw)
In-Reply-To: <20200722155110.713966-1-seanga2@gmail.com>

AFAIK because the K210 clock driver does not come up until after
relocation, the clint will always use the clock-frequency parameter.
Ideally, it should update itself after relocation to take into account the
actual CPU frequency.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

 arch/riscv/dts/k210.dtsi                | 10 ++++++----
 drivers/clk/kendryte/clk.c              |  4 ++++
 include/dt-bindings/clock/k210-sysctl.h |  1 +
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 2546c7d4e0..9583694c46 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -17,6 +17,8 @@
 	compatible = "kendryte,k210";
 
 	aliases {
+		cpu0 = &cpu0;
+		cpu1 = &cpu1;
 		dma0 = &dmac0;
 		gpio0 = &gpio0;
 		gpio1 = &gpio1_0;
@@ -40,7 +42,6 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		timebase-frequency = <7800000>;
 		cpu0: cpu at 0 {
 			device_type = "cpu";
 			compatible = "kendryte,k210", "sifive,rocket0", "riscv";
@@ -126,14 +127,15 @@
 			read-only;
 		};
 
-		clint0: interrupt-controller at 2000000 {
+		clint0: clint at 2000000 {
 			#interrupt-cells = <1>;
 			compatible = "kendryte,k210-clint", "riscv,clint0";
 			reg = <0x2000000 0xC000>;
-			interrupt-controller;
 			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
 					      <&cpu1_intc 3>, <&cpu1_intc 7>;
-			clocks = <&sysclk K210_CLK_CPU>;
+			clocks = <&sysclk K210_CLK_CLINT>;
+			/* sysclk is only available post-relocation */
+			clock-frequency = <7800000>;
 		};
 
 		plic0: interrupt-controller at C000000 {
diff --git a/drivers/clk/kendryte/clk.c b/drivers/clk/kendryte/clk.c
index 981b3b7699..bb196961af 100644
--- a/drivers/clk/kendryte/clk.c
+++ b/drivers/clk/kendryte/clk.c
@@ -646,6 +646,10 @@ static int k210_clk_probe(struct udevice *dev)
 	REGISTER_GATE(K210_CLK_RTC,   "rtc",   in0);
 #undef REGISTER_GATE
 
+	/* The MTIME register in CLINT runs at one 50th the CPU clock speed */
+	clk_dm(K210_CLK_CLINT,
+	       clk_register_fixed_factor(NULL, "clint", "cpu", 0, 1, 50));
+
 	return 0;
 }
 
diff --git a/include/dt-bindings/clock/k210-sysctl.h b/include/dt-bindings/clock/k210-sysctl.h
index 0e3ed3fb9f..fe852bbd92 100644
--- a/include/dt-bindings/clock/k210-sysctl.h
+++ b/include/dt-bindings/clock/k210-sysctl.h
@@ -55,5 +55,6 @@
 #define K210_CLK_OTP    43
 #define K210_CLK_RTC    44
 #define K210_CLK_ACLK   45
+#define K210_CLK_CLINT  46
 
 #endif /* CLOCK_K210_SYSCTL_H */
-- 
2.27.0

  parent reply	other threads:[~2020-07-22 15:51 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-22 15:51 [PATCH 0/6] riscv: Clean up timer drivers Sean Anderson
2020-07-22 15:51 ` [PATCH 1/6] riscv: Rework riscv timer driver to only support S-mode Sean Anderson
2020-07-28  9:11   ` Rick Chen
2020-07-28  9:27     ` Sean Anderson
2020-07-22 15:51 ` [PATCH 2/6] riscv: Rework Andes PLMT as a UCLASS_TIMER driver Sean Anderson
2020-07-23 13:51   ` Bin Meng
2020-07-23 13:54     ` Sean Anderson
2020-07-22 15:51 ` [PATCH 3/6] riscv: Clean up initialization in Andes PLIC Sean Anderson
2020-07-22 15:51 ` [PATCH 4/6] riscv: Rework Sifive CLINT as UCLASS_TIMER driver Sean Anderson
2020-07-22 15:51 ` Sean Anderson [this message]
2020-07-23 11:49   ` [PATCH 5/6] riscv: Update Kendryte device tree for new CLINT driver Sagar Kadam
2020-07-23 11:56     ` Sean Anderson
2020-07-23 13:49       ` Bin Meng
2020-07-23 13:59         ` Sean Anderson
2020-07-24  4:22           ` Sagar Kadam
2020-07-22 15:51 ` [PATCH 6/6] riscv: Update SiFive " Sean Anderson
2020-07-23 13:50   ` Bin Meng
2020-07-23 13:57     ` Sean Anderson
2020-07-23 14:22       ` Pragnesh Patel
2020-07-23 14:47       ` Bin Meng
2020-07-23 14:52         ` Sean Anderson
2020-07-23 16:51           ` Sagar Kadam
2020-07-23 20:27             ` Sean Anderson
2020-07-24  8:03               ` Sagar Kadam
2020-07-24  1:46           ` Bin Meng

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