From mboxrd@z Thu Jan 1 00:00:00 1970 From: mingming lee Date: Wed, 9 Sep 2020 14:07:27 +0800 Subject: [PATCH 2/3] ARM: dts: Mediatek: add i2c node support for mt8512 In-Reply-To: <20200909060728.5616-1-mingming.lee@mediatek.com> References: <20200909060728.5616-1-mingming.lee@mediatek.com> Message-ID: <20200909060728.5616-3-mingming.lee@mediatek.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Mingming Lee add i2c dts node support for mt8512 Signed-off-by: Mingming Lee --- arch/arm/dts/mt8512-bm1-emmc.dts | 12 ++++++++++++ arch/arm/dts/mt8512.dtsi | 38 +++++++++++++++++++++++++++++++++++++- 2 files changed, 49 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/mt8512-bm1-emmc.dts b/arch/arm/dts/mt8512-bm1-emmc.dts index 296ed93..7c02539 100644 --- a/arch/arm/dts/mt8512-bm1-emmc.dts +++ b/arch/arm/dts/mt8512-bm1-emmc.dts @@ -45,6 +45,18 @@ }; }; +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_default>; diff --git a/arch/arm/dts/mt8512.dtsi b/arch/arm/dts/mt8512.dtsi index 01a02a7..39e9499 100644 --- a/arch/arm/dts/mt8512.dtsi +++ b/arch/arm/dts/mt8512.dtsi @@ -90,6 +90,42 @@ reg = <0x10200a80 0x50>; }; + i2c0: i2c at 11007000 { + compatible = "mediatek,mt8512-i2c"; + reg = <0x11007000 0x1000>, + <0x11000080 0x80>; + clocks = <&infracfg CLK_INFRA_I2C0_AXI>, + <&infracfg CLK_INFRA_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c at 10019000 { + compatible = "mediatek,mt8512-i2c"; + reg = <0x10019000 0x1000>, + <0x11000100 0x80>; + clocks = <&infracfg CLK_INFRA_I2C1_AXI>, + <&infracfg CLK_INFRA_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c at 1001e000 { + compatible = "mediatek,mt8512-i2c"; + reg = <0x1001e000 0x1000>, + <0x11000180 0x80>; + clocks = <&infracfg CLK_INFRA_I2C1_AXI>, + <&infracfg CLK_INFRA_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + uart0: serial at 11002000 { compatible = "mediatek,hsuart"; reg = <0x11002000 0x1000>; @@ -112,4 +148,4 @@ status = "disabled"; }; -}; \ No newline at end of file +}; -- 1.9.1