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From: Daniel Palmer <daniel@0x0f.com>
To: u-boot@lists.denx.de
Subject: [RFC PATCH 3/3] arm: mstar: Add boot0 header
Date: Mon, 14 Sep 2020 21:04:41 +0900	[thread overview]
Message-ID: <20200914120441.3274829-4-daniel@0x0f.com> (raw)
In-Reply-To: <20200914120441.3274829-1-daniel@0x0f.com>

The Mstar/SigmaStar v7 boot rom and IPL second stage loader use
the same header for the stage coming after them except for a slightly
different magic string in the header.

This patch adds the header and sets up the right string depending
on if the SPL is going to be loaded by the boot rom or by an IPL.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 MAINTAINERS                               |  1 +
 arch/arm/Kconfig                          |  1 +
 arch/arm/include/asm/arch-mstarv7/boot0.h | 29 +++++++++++++++++++++++
 arch/arm/mach-mstar/Kconfig               |  3 +++
 4 files changed, 34 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mstarv7/boot0.h

diff --git a/MAINTAINERS b/MAINTAINERS
index be621a614f..5f87ea55fd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -297,6 +297,7 @@ ARM MSTAR/SIGMASTAR V7
 M:	Daniel Palmer <daniel@thingy.jp>
 S:	Maintained
 F:	arch/arm/mach-mstar/
+F:	arch/arm/include/asm/arch-mstarv7/
 
 ARM NEXELL S5P4418
 M:	Stefan Bosch <stefan_b@posteo.net>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7a25410ede..15cad7ff43 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1170,6 +1170,7 @@ config ARCH_MSTARV7
 	bool "MStar/SigmaStar ARM v7 SoCs"
 	select CPU_V7A
 	select SYS_NS16550
+	select ENABLE_ARM_SOC_BOOT0_HOOK
 	imply SUPPORT_SPL
 
 config ARCH_TEGRA
diff --git a/arch/arm/include/asm/arch-mstarv7/boot0.h b/arch/arm/include/asm/arch-mstarv7/boot0.h
new file mode 100644
index 0000000000..0db6c568fb
--- /dev/null
+++ b/arch/arm/include/asm/arch-mstarv7/boot0.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Second stage (after bootrom) and Third stage (After IPL)
+ * header for MStar/SigmaStar Arm v7 SoCs.
+ *
+ * Copyright (c) 2020 Daniel Palmer <daniel@thingy.jp>.
+ */
+
+/* The first 4 bytes should be an instruction */
+	b reset
+
+#ifdef CONFIG_MSTAR_IPL
+	/* this is needed for the IPL to jump into our image */
+	.ascii	"IPLC"
+#else
+	/* this is needed for the bootrom to jump into our image */
+	.ascii	"IPL_"
+#endif
+	/* this is the size of the image to load */
+	.2byte	0x0000
+
+	/* this seems to be the chip id */
+	.byte	0x0
+
+	/* this is something to do with authentication */
+	.byte	0x0
+
+	/* this is a checksum, doesn't always need to be right */
+	.long	0x0000
diff --git a/arch/arm/mach-mstar/Kconfig b/arch/arm/mach-mstar/Kconfig
index a278c042e2..cc1a68b191 100644
--- a/arch/arm/mach-mstar/Kconfig
+++ b/arch/arm/mach-mstar/Kconfig
@@ -26,4 +26,7 @@ config DEBUG_UART_CLOCK
 config DEBUG_UART_SHIFT
 	default 3
 
+config SYS_SOC
+	default "mstarv7"
+
 endif
-- 
2.27.0

  parent reply	other threads:[~2020-09-14 12:04 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-14 12:04 [RFC PATCH 0/3] Start of MStar/SigmaStar Arm v7 SoC support Daniel Palmer
2020-09-14 12:04 ` [RFC PATCH 1/3] arm: mstar: Initial MStar/SigmaStar Armv7 " Daniel Palmer
2020-09-14 12:04 ` [RFC PATCH 2/3] arm: mstar: Add option for loading the SPL from the IPL Daniel Palmer
2020-09-14 12:04 ` Daniel Palmer [this message]
2020-09-14 18:56 ` [RFC PATCH 0/3] Start of MStar/SigmaStar Arm v7 SoC support Tom Rini
2020-09-15 10:14   ` Daniel Palmer

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