[PATCH 0/5] sunxi: video: Add V3S simple-framebuffer

Martin Cerveny
2020-09-16T14:10:47Z

There are patches to enable "allwinner,simple-framebuffer"
with "mixer0-lcd0" pipeline for V3s.

First patch corrects "2x pll" loop for pixelclock search.
Second patch enable PWM0 (for backlight support).
Third patch is the main extension to code and build:
- V3s has 2x VI and 1x UI channels (use UI channel), so use third channel.
- V3s uses PLL3 (PLL_VIDEO) for both DE2 and TCON0 pixelclock.
PLL10 is used for DDR2.
- V3s supports resolution upto 1024x1024. Also scale down memory
requirements for V3s (64MB embedded DDR2)
- V3s does not support HDMI.
Fourth patch extends u-boot DTS (linux DTS patch coming soon)
Fifth patch enable PWM drivers and corrects CONFIG_VIDEO_LCD_DCLK_PHASE.

Tested with "Lichee Zero" V3s and 480x272 LCD
(not configured DRM DE2/TCON0/panel in linux DTS).
- https://github.com/mcerveny/u-boot/tree/simplefb_v3s_v1

Martin Cerveny (5):
sunxi: video: No double clock on DE2
pwm: sunxi: v3s: Enable PWM0
sunxi: video: v3s: Enable LCD support
arm: dts: v3s: Add support for simple-framebuffer with DE2/TCON
sunxi: add drivers and configs needed for LCD display

arch/arm/dts/sun8i-v3s.dtsi | 128 +++++++++++++++++-
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 5 +-
arch/arm/include/asm/arch-sunxi/gpio.h | 2 +
arch/arm/mach-sunxi/Kconfig | 1 +
configs/LicheePi_Zero_defconfig | 4 +
drivers/pwm/sunxi_pwm.c | 3 +
drivers/video/sunxi/lcdc.c | 7 +-
drivers/video/sunxi/sunxi_de2.c | 25 +++-
drivers/video/sunxi/sunxi_dw_hdmi.c | 2 +
drivers/video/sunxi/sunxi_lcd.c | 9 +-
10 files changed, 172 insertions(+), 14 deletions(-)

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2.17.1