[PATCH 2/2] tools: socfpgaimage: Add param entry point (ep) support for Arria 10 (v1)

[Ley Foon Tan <ley.foon.tan@intel.com>]

Add param entry point (ep) support for Arria 10 header. User can pass in
'e' option to mkimage to set the entry point. This is an optional option.

If not specified, default is 0x14.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
 tools/socfpgaimage.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/tools/socfpgaimage.c b/tools/socfpgaimage.c
index f71b3d59ddcb..3ba3c93af1bd 100644
--- a/tools/socfpgaimage.c
+++ b/tools/socfpgaimage.c
@@ -123,8 +123,10 @@ static uint16_t sfp_hdr_checksum(uint8_t *buf, unsigned char ver)
 }
 
 static void sfp_build_header(uint8_t *buf, uint8_t ver, uint8_t flags,
-			     uint32_t length_bytes)
+			     uint32_t length_bytes,
+			     struct image_tool_params *params)
 {
+	uint32_t entry_offset = params->eflag ? params->ep : ENTRY_POINT_OFFSET;
 	struct socfpga_header_v0 header_v0 = {
 		.validation	= cpu_to_le32(VALIDATION_WORD),
 		.version	= 0,
@@ -139,7 +141,8 @@ static void sfp_build_header(uint8_t *buf, uint8_t ver, uint8_t flags,
 		.flags		= flags,
 		.header_u8	= cpu_to_le16(sizeof(header_v1)),
 		.length_u8	= cpu_to_le32(length_bytes),
-		.entry_offset	= cpu_to_le32(0x14),	/* Trampoline offset */
+		/* Trampoline offset */
+		.entry_offset	= cpu_to_le32(entry_offset),
 		.zero		= 0,
 	};
 
@@ -201,7 +204,8 @@ static int sfp_verify_header(const uint8_t *buf, uint8_t *ver)
 
 /* Sign the buffer and return the signed buffer size */
 static int sfp_sign_buffer(uint8_t *buf, uint8_t ver, uint8_t flags,
-			   int len, int pad_64k)
+			   int len, int pad_64k,
+			   struct image_tool_params *params)
 {
 	uint32_t calc_crc;
 
@@ -209,7 +213,7 @@ static int sfp_sign_buffer(uint8_t *buf, uint8_t ver, uint8_t flags,
 	len = ALIGN(len, 4);
 
 	/* Build header, adding 4 bytes to length to hold the CRC32. */
-	sfp_build_header(buf + HEADER_OFFSET, ver, flags, len + 4);
+	sfp_build_header(buf + HEADER_OFFSET, ver, flags, len + 4, params);
 
 	/* Calculate and apply the CRC */
 	calc_crc = ~pbl_crc32(0, (char *)buf, len);
@@ -366,7 +370,8 @@ static int socfpgaimage_vrec_header_v1(struct image_tool_params *params,
 	return sfp_vrec_header(params, tparams, 1);
 }
 
-static void sfp_set_header(void *ptr, unsigned char ver)
+static void sfp_set_header(void *ptr, unsigned char ver,
+			   struct image_tool_params *params)
 {
 	uint8_t *buf = (uint8_t *)ptr;
 
@@ -380,19 +385,19 @@ static void sfp_set_header(void *ptr, unsigned char ver)
 	memmove(buf, buf + sfp_fake_header_size(data_size, ver), data_size);
 	memset(buf + data_size, 0, sfp_fake_header_size(data_size, ver));
 
-	sfp_sign_buffer(buf, ver, 0, data_size, 0);
+	sfp_sign_buffer(buf, ver, 0, data_size, 0, params);
 }
 
 static void socfpgaimage_set_header_v0(void *ptr, struct stat *sbuf, int ifd,
 				       struct image_tool_params *params)
 {
-	sfp_set_header(ptr, 0);
+	sfp_set_header(ptr, 0, params);
 }
 
 static void socfpgaimage_set_header_v1(void *ptr, struct stat *sbuf, int ifd,
 				       struct image_tool_params *params)
 {
-	sfp_set_header(ptr, 1);
+	sfp_set_header(ptr, 1, params);
 }
 
 U_BOOT_IMAGE_TYPE(
-- 
2.19.0