From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v6 2/9] timer: Add helper for drivers using timebase fallback
Date: Mon, 28 Sep 2020 10:52:22 -0400 [thread overview]
Message-ID: <20200928145229.449782-3-seanga2@gmail.com> (raw)
In-Reply-To: <20200928145229.449782-1-seanga2@gmail.com>
This function is designed to be used when a timer used to be initialized by
the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In
such a case, the timer may prefer to use the clocks and clock-frequency
properties, but should be able to fall back on using the cpu's
timebase-frequency.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
---
Changes in v6:
- Don't compile timer_timebase_fallback if CONFIG_CPU is disabled. This config
is only disabled on nds32; perhaps it can be enabled in the future? In
addition, SPL_CPU_SUPPORT should probably be renamed to SPL_CPU
Changes in v4:
- New
drivers/timer/timer-uclass.c | 31 +++++++++++++++++++++++++++++++
include/timer.h | 15 +++++++++++++++
2 files changed, 46 insertions(+)
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index 14dde950a1..e9802c8b43 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <cpu.h>
#include <dm.h>
#include <init.h>
#include <dm/lists.h>
@@ -79,6 +80,36 @@ static int timer_post_probe(struct udevice *dev)
return 0;
}
+/*
+ * TODO: should be CONFIG_IS_ENABLED(CPU), but the SPL config has _SUPPORT on
+ * the end...
+ */
+#if defined(CONFIG_CPU) || defined(CONFIG_SPL_CPU_SUPPORT)
+int timer_timebase_fallback(struct udevice *dev)
+{
+ struct udevice *cpu;
+ struct cpu_platdata *cpu_plat;
+ struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ /* Did we get our clock rate from the device tree? */
+ if (uc_priv->clock_rate)
+ return 0;
+
+ /* Fall back to timebase-frequency */
+ dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n");
+ cpu = cpu_get_current_dev();
+ if (!cpu)
+ return -ENODEV;
+
+ cpu_plat = dev_get_parent_platdata(cpu);
+ if (!cpu_plat)
+ return -ENODEV;
+
+ uc_priv->clock_rate = cpu_plat->timebase_freq;
+ return 0;
+}
+#endif
+
u64 timer_conv_64(u32 count)
{
/* increment tbh if tbl has rolled over */
diff --git a/include/timer.h b/include/timer.h
index a49b500ce3..8b9fa51c53 100644
--- a/include/timer.h
+++ b/include/timer.h
@@ -15,6 +15,21 @@
*/
int dm_timer_init(void);
+/**
+ * timer_timebase_fallback() - Helper for timers using timebase fallback
+ * @dev: A timer partially-probed timer device
+ *
+ * This is a helper function designed for timers which need to fall back on the
+ * cpu's timebase. This function is designed to be called during the driver's
+ * probe(). If there is a clocks or clock-frequency property in the timer's
+ * binding, then it will be used. Otherwise, the timebase of the current cpu
+ * will be used. This is initialized by the cpu driver, and usually gotten from
+ * ``/cpus/timebase-frequency`` or ``/cpus/cpu at X/timebase-frequency``.
+ *
+ * Return: 0 if OK, or negative error code on failure
+ */
+int timer_timebase_fallback(struct udevice *dev);
+
/*
* timer_conv_64 - convert 32-bit counter value to 64-bit
*
--
2.28.0
next prev parent reply other threads:[~2020-09-28 14:52 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-28 14:52 [PATCH v6 0/9] riscv: Clean up timer drivers Sean Anderson
2020-09-28 14:52 ` [PATCH v6 1/9] riscv: Rework riscv timer driver to only support S-mode Sean Anderson
2020-09-28 14:52 ` Sean Anderson [this message]
2020-09-28 14:52 ` [PATCH v6 3/9] timer: Add a test for timer_timebase_fallback Sean Anderson
2020-09-28 14:52 ` [PATCH v6 4/9] riscv: Rework Andes PLMT as a UCLASS_TIMER driver Sean Anderson
2020-09-28 14:52 ` [PATCH v6 5/9] riscv: Clean up initialization in Andes PLIC Sean Anderson
2020-09-28 14:52 ` [PATCH v6 6/9] riscv: Rework Sifive CLINT as UCLASS_TIMER driver Sean Anderson
2020-09-28 14:52 ` [PATCH v6 7/9] riscv: clk: Add CLINT clock to kendryte clock driver Sean Anderson
2020-09-28 14:52 ` [PATCH v6 8/9] riscv: Update Kendryte device tree for new CLINT driver Sean Anderson
2020-09-28 14:52 ` [PATCH v6 9/9] riscv: Update SiFive " Sean Anderson
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