* [PATCH 3/3] riscv: Complete efi header for RV32/64
@ 2020-11-17 8:07 Leo Liang
2020-11-18 15:47 ` Heinrich Schuchardt
2020-11-23 16:59 ` Atish Patra
0 siblings, 2 replies; 3+ messages in thread
From: Leo Liang @ 2020-11-17 8:07 UTC (permalink / raw)
To: u-boot
Date: Mon, 16 Nov 2020 17:07:41 +0800
From: Leo Yu-Chi Liang <ycliang@andestech.com>
Subject: [PATCH 3/3] riscv: Complete efi header for RV32/64
This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra at wdc.com/)
Add fields to complete Optional Header "Data Directories" specified in the document.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick at andestech.com
Cc: alankao at andestech.com
Cc: atish.patra at wdc.com
Cc: xypron.glpk at gmx.de
Cc: bmeng.cn at gmail.com
---
arch/riscv/lib/crt0_riscv_efi.S | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S
index 48ff89553b..e7c4d99c21 100644
--- a/arch/riscv/lib/crt0_riscv_efi.S
+++ b/arch/riscv/lib/crt0_riscv_efi.S
@@ -107,6 +107,16 @@ extra_header_fields:
.quad 0 /* ExceptionTable */
.quad 0 /* CertificationTable */
.quad 0 /* BaseRelocationTable */
+ .quad 0 /* Debug */
+ .quad 0 /* Architecture */
+ .quad 0 /* Global Ptr */
+ .quad 0 /* TLS Table */
+ .quad 0 /* Load Config Table */
+ .quad 0 /* Bound Import */
+ .quad 0 /* IAT */
+ .quad 0 /* Delay Import Descriptor */
+ .quad 0 /* CLR Runtime Header */
+ .quad 0 /* Reserved */
/* Section table */
section_table:
--
2.17.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 3/3] riscv: Complete efi header for RV32/64
2020-11-17 8:07 [PATCH 3/3] riscv: Complete efi header for RV32/64 Leo Liang
@ 2020-11-18 15:47 ` Heinrich Schuchardt
2020-11-23 16:59 ` Atish Patra
1 sibling, 0 replies; 3+ messages in thread
From: Heinrich Schuchardt @ 2020-11-18 15:47 UTC (permalink / raw)
To: u-boot
On 17.11.20 09:07, Leo Liang wrote:
> Date: Mon, 16 Nov 2020 17:07:41 +0800
> From: Leo Yu-Chi Liang <ycliang@andestech.com>
> Subject: [PATCH 3/3] riscv: Complete efi header for RV32/64
>
> This patch depends on Atish's patch.
> (https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra at wdc.com/)
>
> Add fields to complete Optional Header "Data Directories" specified in the document.
> (https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)
>
> Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
> Cc: rick at andestech.com
> Cc: alankao at andestech.com
> Cc: atish.patra at wdc.com
> Cc: xypron.glpk at gmx.de
> Cc: bmeng.cn at gmail.com
> ---
> arch/riscv/lib/crt0_riscv_efi.S | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S
> index 48ff89553b..e7c4d99c21 100644
> --- a/arch/riscv/lib/crt0_riscv_efi.S
> +++ b/arch/riscv/lib/crt0_riscv_efi.S
> @@ -107,6 +107,16 @@ extra_header_fields:
> .quad 0 /* ExceptionTable */
> .quad 0 /* CertificationTable */
> .quad 0 /* BaseRelocationTable */
> + .quad 0 /* Debug */
> + .quad 0 /* Architecture */
> + .quad 0 /* Global Ptr */
> + .quad 0 /* TLS Table */
> + .quad 0 /* Load Config Table */
> + .quad 0 /* Bound Import */
> + .quad 0 /* IAT */
> + .quad 0 /* Delay Import Descriptor */
> + .quad 0 /* CLR Runtime Header */
> + .quad 0 /* Reserved */
>
> /* Section table */
> section_table:
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 3/3] riscv: Complete efi header for RV32/64
2020-11-17 8:07 [PATCH 3/3] riscv: Complete efi header for RV32/64 Leo Liang
2020-11-18 15:47 ` Heinrich Schuchardt
@ 2020-11-23 16:59 ` Atish Patra
1 sibling, 0 replies; 3+ messages in thread
From: Atish Patra @ 2020-11-23 16:59 UTC (permalink / raw)
To: u-boot
On Tue, Nov 17, 2020 at 12:07 AM Leo Liang <ycliang@andestech.com> wrote:
>
> Date: Mon, 16 Nov 2020 17:07:41 +0800
> From: Leo Yu-Chi Liang <ycliang@andestech.com>
> Subject: [PATCH 3/3] riscv: Complete efi header for RV32/64
>
> This patch depends on Atish's patch.
> (https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra at wdc.com/)
>
> Add fields to complete Optional Header "Data Directories" specified in the document.
> (https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)
>
> Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
> Cc: rick at andestech.com
> Cc: alankao at andestech.com
> Cc: atish.patra at wdc.com
> Cc: xypron.glpk at gmx.de
> Cc: bmeng.cn at gmail.com
> ---
> arch/riscv/lib/crt0_riscv_efi.S | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S
> index 48ff89553b..e7c4d99c21 100644
> --- a/arch/riscv/lib/crt0_riscv_efi.S
> +++ b/arch/riscv/lib/crt0_riscv_efi.S
> @@ -107,6 +107,16 @@ extra_header_fields:
> .quad 0 /* ExceptionTable */
> .quad 0 /* CertificationTable */
> .quad 0 /* BaseRelocationTable */
> + .quad 0 /* Debug */
> + .quad 0 /* Architecture */
> + .quad 0 /* Global Ptr */
> + .quad 0 /* TLS Table */
> + .quad 0 /* Load Config Table */
> + .quad 0 /* Bound Import */
> + .quad 0 /* IAT */
> + .quad 0 /* Delay Import Descriptor */
> + .quad 0 /* CLR Runtime Header */
> + .quad 0 /* Reserved */
>
> /* Section table */
> section_table:
> --
> 2.17.0
Reviewed-by: Atish Patra <atish.patra@wdc.com>
--
Regards,
Atish
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-11-17 8:07 [PATCH 3/3] riscv: Complete efi header for RV32/64 Leo Liang
2020-11-18 15:47 ` Heinrich Schuchardt
2020-11-23 16:59 ` Atish Patra
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