[PATCH 06/26] x86: Move priv/plat structs for intel_common to headers

Simon Glass
2020-12-19T17:39:58Z

With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

arch/x86/cpu/intel_common/itss.c | 19 -------------------
arch/x86/cpu/intel_common/p2sb.c | 9 +--------
arch/x86/include/asm/itss.h | 21 +++++++++++++++++++++
arch/x86/include/asm/p2sb.h | 18 ++++++++++++++++++
4 files changed, 40 insertions(+), 27 deletions(-)
create mode 100644 arch/x86/include/asm/p2sb.h

diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c
index 6515d1f471f..ae4de4ca8c6 100644
--- a/arch/x86/cpu/intel_common/itss.c
+++ b/arch/x86/cpu/intel_common/itss.c
@@ -19,25 +19,6 @@
#include <spl.h>
#include <asm/itss.h>

-struct itss_plat {
-#if CONFIG_IS_ENABLED(OF_PLATDATA)
- /* Put this first since driver model will copy the data here */
- struct dtd_intel_itss dtplat;
-#endif
-};
-
-/* struct pmc_route - Routing for PMC to GPIO */
-struct pmc_route {
- u32 pmc;
- u32 gpio;
-};
-
-struct itss_priv {
- struct pmc_route *route;
- uint route_count;
- u32 irq_snapshot[NUM_IPC_REGS];
-};
-
static int set_polarity(struct udevice *dev, uint irq, bool active_low)
{
u32 mask;
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index cb901f265e2..d73ae438bbb 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -13,20 +13,13 @@
#include <log.h>
#include <p2sb.h>
#include <spl.h>
+#include <asm/p2sb.h>
#include <asm/pci.h>
#include <linux/bitops.h>

#define PCH_P2SB_E0 0xe0
#define HIDE_BIT BIT(0)

-struct p2sb_plat {
-#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct dtd_intel_p2sb dtplat;
-#endif
- ulong mmio_base;
- pci_dev_t bdf;
-};
-
/* PCI config space registers */
#define HPTC_OFFSET 0x60
#define HPTC_ADDR_ENABLE_BIT BIT(7)
diff --git a/arch/x86/include/asm/itss.h b/arch/x86/include/asm/itss.h
index f7d32403849..6d4793277e6 100644
--- a/arch/x86/include/asm/itss.h
+++ b/arch/x86/include/asm/itss.h
@@ -11,6 +11,8 @@
#ifndef _ASM_ARCH_ITSS_H
#define _ASM_ARCH_ITSS_H

+#include <irq.h>
+
#define GPIO_IRQ_START 50
#define GPIO_IRQ_END ITSS_MAX_IRQ

@@ -42,4 +44,23 @@
/* ITSS Power reduction control */
#define PCR_ITSS_ITSSPRC 0x3300

+struct itss_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ /* Put this first since driver model will copy the data here */
+ struct dtd_intel_itss dtplat;
+#endif
+};
+
+/* struct pmc_route - Routing for PMC to GPIO */
+struct pmc_route {
+ u32 pmc;
+ u32 gpio;
+};
+
+struct itss_priv {
+ struct pmc_route *route;
+ uint route_count;
+ u32 irq_snapshot[NUM_IPC_REGS];
+};
+
#endif /* _ASM_ARCH_ITSS_H */
diff --git a/arch/x86/include/asm/p2sb.h b/arch/x86/include/asm/p2sb.h
new file mode 100644
index 00000000000..6f63eae8e27
--- /dev/null
+++ b/arch/x86/include/asm/p2sb.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#ifndef ASM_P2SB_H
+#define ASM_P2SB_H
+
+/* Platform data for the P2SB */
+struct p2sb_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_intel_p2sb dtplat;
+#endif
+ ulong mmio_base;
+ pci_dev_t bdf;
+};
+
+#endif /* ASM_P2SB_H */
--
2.29.2.684.gfbc64c5ab5-goog