From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Date: Fri, 22 Jan 2021 01:17:51 +0000 Subject: [PATCH v2 09/21] sunxi: add support for H616 uart0 In-Reply-To: <20210111201153.1800440-10-jernej.skrabec@siol.net> References: <20210111201153.1800440-1-jernej.skrabec@siol.net> <20210111201153.1800440-10-jernej.skrabec@siol.net> Message-ID: <20210122011751.6d2c6de7@slackpad.fritz.box> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, 11 Jan 2021 21:11:41 +0100 Jernej Skrabec wrote: > This port is used for debug terminal on all known H616 boards. > > Reviewed-by: Samuel Holland > Signed-off-by: Jernej Skrabec Compared the bits against the manual. Reviewed-by: Andre Przywara Cheers, Andre > --- > arch/arm/include/asm/arch-sunxi/gpio.h | 1 + > arch/arm/mach-sunxi/board.c | 4 ++++ > 2 files changed, 5 insertions(+) > > diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h > index f817d328f432..cdb7dbd5b8e5 100644 > --- a/arch/arm/include/asm/arch-sunxi/gpio.h > +++ b/arch/arm/include/asm/arch-sunxi/gpio.h > @@ -206,6 +206,7 @@ enum sunxi_gpio_number { > #define SUN6I_GPH_UART0 2 > #define SUN9I_GPH_UART0 2 > #define SUN50I_H6_GPH_UART0 2 > +#define SUN50I_H616_GPH_UART0 2 > > #define SUNXI_GPI_SDC3 2 > #define SUN7I_GPI_TWI3 3 > diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c > index 8ed9a87c1195..a883edd24107 100644 > --- a/arch/arm/mach-sunxi/board.c > +++ b/arch/arm/mach-sunxi/board.c > @@ -116,6 +116,10 @@ static int gpio_init(void) > sunxi_gpio_set_cfgpin(SUNXI_GPH(0), SUN50I_H6_GPH_UART0); > sunxi_gpio_set_cfgpin(SUNXI_GPH(1), SUN50I_H6_GPH_UART0); > sunxi_gpio_set_pull(SUNXI_GPH(1), SUNXI_GPIO_PULL_UP); > +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN50I_H616) > + sunxi_gpio_set_cfgpin(SUNXI_GPH(0), SUN50I_H616_GPH_UART0); > + sunxi_gpio_set_cfgpin(SUNXI_GPH(1), SUN50I_H616_GPH_UART0); > + sunxi_gpio_set_pull(SUNXI_GPH(1), SUNXI_GPIO_PULL_UP); > #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_A83T) > sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0); > sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0);