From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Date: Thu, 4 Mar 2021 01:41:11 +0000 Subject: [PATCH 02/19] video: sunxi: Add mode_valid callback to sunxi_dw_hdmi In-Reply-To: <20210223204631.1609597-3-jernej.skrabec@siol.net> References: <20210223204631.1609597-1-jernej.skrabec@siol.net> <20210223204631.1609597-3-jernej.skrabec@siol.net> Message-ID: <20210304014111.1be9d3ab@slackpad.fritz.box> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, 23 Feb 2021 21:46:14 +0100 Jernej Skrabec wrote: > Currently driver accepts all resolution which won't work on 4k screens. > Add validation callback which limits acceptable resolutions to 297 MHz. Makes sense. Newer SoCs seem to support more, but apparently not without further code to enable higher clock rates. > Signed-off-by: Jernej Skrabec Reviewed-by: Andre Przywara Cheers, Andre > --- > drivers/video/sunxi/sunxi_dw_hdmi.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c > index 0b8cefc311ef..e3811a2ec15f 100644 > --- a/drivers/video/sunxi/sunxi_dw_hdmi.c > +++ b/drivers/video/sunxi/sunxi_dw_hdmi.c > @@ -305,6 +305,12 @@ static int sunxi_dw_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size) > return dw_hdmi_read_edid(&priv->hdmi, buf, buf_size); > } > > +static bool sunxi_dw_hdmi_mode_valid(struct udevice *dev, > + const struct display_timing *timing) > +{ > + return timing->pixelclock.typ <= 297000000; > +} > + > static int sunxi_dw_hdmi_enable(struct udevice *dev, int panel_bpp, > const struct display_timing *edid) > { > @@ -388,6 +394,7 @@ static int sunxi_dw_hdmi_probe(struct udevice *dev) > static const struct dm_display_ops sunxi_dw_hdmi_ops = { > .read_edid = sunxi_dw_hdmi_read_edid, > .enable = sunxi_dw_hdmi_enable, > + .mode_valid = sunxi_dw_hdmi_mode_valid, > }; > > U_BOOT_DRIVER(sunxi_dw_hdmi) = {