From: Leo Liang <ycliang@andestech.com>
To: u-boot@lists.denx.de
Subject: [RFC PATCH v2 1/2] arch: riscv: cpu: Add callback to init each core
Date: Fri, 26 Mar 2021 09:22:25 +0800 [thread overview]
Message-ID: <20210326012217.GA26605@andestech.com> (raw)
In-Reply-To: <20210323083539.9552-1-green.wan@sifive.com>
Hi Green,
On Tue, Mar 23, 2021 at 01:35:38AM -0700, Green Wan wrote:
> Add a callback riscv_hart_early_init() to ./arch/riscv/cpu/start.S to
> allow different riscv hart perform setup code for each hart as early
> as possible. Since all the harts enter the calback, they must be able
> to run the same setup.
>
> Signed-off-by: Green Wan <green.wan@sifive.com>
> ---
> arch/riscv/cpu/start.S | 5 +++++
> arch/riscv/lib/spl.c | 4 ++++
This patch fails to compile for some defconfigs.
(CI result: https://dev.azure.com/ycliang-tw/u-boot-riscv/_build/results?buildId=15&view=results)
Maybe we should come up with a better place to add this function.
Best regards,
Leo
> 2 files changed, 9 insertions(+)
>
> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> index 8589509e01..5c7d4da9e2 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -117,6 +117,11 @@ call_board_init_f_0:
> mv sp, a0
> #endif
>
> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
> +call_riscv_hart_early_init:
> + jal riscv_hart_early_init
> +#endif
> +
> #ifndef CONFIG_XIP
> /*
> * Pick hart to initialize global data and run U-Boot. The other harts
> diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c
> index 8baee07bea..e5b1affbfc 100644
> --- a/arch/riscv/lib/spl.c
> +++ b/arch/riscv/lib/spl.c
> @@ -14,6 +14,10 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +__weak void riscv_hart_early_init(void)
> +{
> +}
> +
> __weak int spl_board_init_f(void)
> {
> return 0;
next prev parent reply other threads:[~2021-03-26 1:22 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 8:35 [RFC PATCH v2 1/2] arch: riscv: cpu: Add callback to init each core Green Wan
2021-03-23 8:35 ` [RFC PATCH v2 2/2] board: sifive: unmatched: clear feature disable CSR Green Wan
2021-03-24 0:32 ` Sean Anderson
2021-03-24 0:27 ` [RFC PATCH v2 1/2] arch: riscv: cpu: Add callback to init each core Sean Anderson
2021-03-26 1:22 ` Leo Liang [this message]
2021-03-26 1:34 ` Sean Anderson
2021-03-26 9:03 ` Green Wan
2021-03-29 2:23 ` [RFC PATCH v3 " Leo Liang
2021-03-29 2:32 ` Green Wan
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