From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sean Anderson Date: Fri, 2 Apr 2021 19:05:08 -0400 Subject: [PATCH v2 03/10] spi: dw: Log status register on timeout In-Reply-To: <20210402230515.177825-1-seanga2@gmail.com> References: <20210402230515.177825-1-seanga2@gmail.com> Message-ID: <20210402230515.177825-4-seanga2@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This logs the status register on timeout, so it is easier to determine the cause of the failure. Signed-off-by: Sean Anderson --- (no changes since v1) drivers/spi/designware_spi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 742121140d..519d6e32bd 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -552,6 +552,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen, if (readl_poll_timeout(priv->regs + DW_SPI_SR, val, (val & SR_TF_EMPT) && !(val & SR_BUSY), RX_TIMEOUT * 1000)) { + dev_dbg(bus, "timed out; sr=%x\n", dw_read(priv, DW_SPI_SR)); ret = -ETIMEDOUT; } @@ -639,6 +640,8 @@ static int dw_spi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) if (readl_poll_timeout(priv->regs + DW_SPI_SR, val, (val & SR_TF_EMPT) && !(val & SR_BUSY), RX_TIMEOUT * 1000)) { + dev_dbg(bus, "timed out; sr=%x\n", + dw_read(priv, DW_SPI_SR)); ret = -ETIMEDOUT; } } -- 2.31.0