public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [PATCH v8 01/28] spi: spi-mem: allow specifying whether an op is DTR or not
Date: Mon, 5 Apr 2021 07:47:54 -0400	[thread overview]
Message-ID: <20210405114754.GR1310@bill-the-cat> (raw)
In-Reply-To: <20210405082504.m44kckapnn2btonl@ti.com>

On Mon, Apr 05, 2021 at 01:55:06PM +0530, Pratyush Yadav wrote:
> On 02/04/21 06:21PM, Sean Anderson wrote:
> > 
> > On 4/1/21 3:31 PM, Pratyush Yadav wrote:
> > > Each phase is given a separate 'dtr' field so mixed protocols like
> > > 4S-4D-4D can be supported.
> > > 
> > > Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> > > ---
> > >   drivers/spi/spi-mem.c | 3 +++
> > >   include/spi-mem.h     | 8 ++++++++
> > >   2 files changed, 11 insertions(+)
> > > 
> > > diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> > > index c095ae9505..427f7c13c5 100644
> > > --- a/drivers/spi/spi-mem.c
> > > +++ b/drivers/spi/spi-mem.c
> > > @@ -164,6 +164,9 @@ bool spi_mem_default_supports_op(struct spi_slave *slave,
> > >   				   op->data.dir == SPI_MEM_DATA_OUT))
> > >   		return false;
> > > +	if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
> > > +		return false;
> > > +
> > >   	return true;
> > >   }
> > >   EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
> > > diff --git a/include/spi-mem.h b/include/spi-mem.h
> > > index 8be3e2bf6b..9e6b044548 100644
> > > --- a/include/spi-mem.h
> > > +++ b/include/spi-mem.h
> > > @@ -71,6 +71,7 @@ enum spi_mem_data_dir {
> > >    * struct spi_mem_op - describes a SPI memory operation
> > >    * @cmd.buswidth: number of IO lines used to transmit the command
> > >    * @cmd.opcode: operation opcode
> > > + * @cmd.dtr: whether the command opcode should be sent in DTR mode or not
> > >    * @addr.nbytes: number of address bytes to send. Can be zero if the operation
> > >    *		 does not need to send an address
> > >    * @addr.buswidth: number of IO lines used to transmit the address cycles
> > > @@ -78,10 +79,13 @@ enum spi_mem_data_dir {
> > >    *	      Note that only @addr.nbytes are taken into account in this
> > >    *	      address value, so users should make sure the value fits in the
> > >    *	      assigned number of bytes.
> > > + * @addr.dtr: whether the address should be sent in DTR mode or not
> > >    * @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can
> > >    *		  be zero if the operation does not require dummy bytes
> > >    * @dummy.buswidth: number of IO lanes used to transmit the dummy bytes
> > > + * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not
> > >    * @data.buswidth: number of IO lanes used to send/receive the data
> > > + * @data.dtr: whether the data should be sent in DTR mode or not
> > >    * @data.dir: direction of the transfer
> > >    * @data.buf.in: input buffer
> > >    * @data.buf.out: output buffer
> > > @@ -90,21 +94,25 @@ struct spi_mem_op {
> > >   	struct {
> > >   		u8 buswidth;
> > >   		u8 opcode;
> > > +		u8 dtr : 1;
> > >   	} cmd;
> > >   	struct {
> > >   		u8 nbytes;
> > >   		u8 buswidth;
> > > +		u8 dtr : 1;
> > >   		u64 val;
> > >   	} addr;
> > >   	struct {
> > >   		u8 nbytes;
> > >   		u8 buswidth;
> > > +		u8 dtr : 1;
> > >   	} dummy;
> > >   	struct {
> > >   		u8 buswidth;
> > > +		u8 dtr : 1;
> > >   		enum spi_mem_data_dir dir;
> > >   		unsigned int nbytes;
> > >   		/* buf.{in,out} must be DMA-able. */
> > > 
> > 
> > I know this is following the Linux code, but are bitfields kosher for
> > U-Boot? This is more of a general question than a specific critique of
> > this code.
> 
> I'm not sure. I did a quick grep and I do see some usages of bitfields 
> but I'm not sure if these just slipped in with ports from Linux or they 
> are "officially" allowed.

We try to be a friendly environment to people used to working on the
Linux kernel, so is there a reason we wouldn't allow bitfields?

-- 
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 659 bytes
Desc: not available
URL: <https://lists.denx.de/pipermail/u-boot/attachments/20210405/9fef73ca/attachment.sig>

  reply	other threads:[~2021-04-05 11:47 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-01 19:31 [PATCH v8 00/28] mtd: spi-nor-core: add xSPI Octal DTR support Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 01/28] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2021-04-02 22:21   ` Sean Anderson
2021-04-05  8:25     ` Pratyush Yadav
2021-04-05 11:47       ` Tom Rini [this message]
2021-04-05 13:12         ` Sean Anderson
2021-04-05 13:57           ` Pratyush Yadav
2021-04-05 14:58             ` Tom Rini
2021-04-01 19:31 ` [PATCH v8 02/28] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2021-04-02 22:29   ` Sean Anderson
2021-04-05  8:18     ` Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 03/28] spi: spi-mem: export spi_mem_default_supports_op() Pratyush Yadav
2021-04-02 22:09   ` Sean Anderson
2021-04-01 19:31 ` [PATCH v8 04/28] spi: spi-mem: add spi_mem_dtr_supports_op() Pratyush Yadav
2021-04-02 22:31   ` Sean Anderson
2021-04-05  7:40     ` Pratyush Yadav
2021-04-05 13:16       ` Sean Anderson
2021-04-01 19:31 ` [PATCH v8 05/28] spi: cadence-qspi: Do not calibrate when device tree sets read delay Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 06/28] spi: cadence-qspi: Add a small delay before indirect writes Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 07/28] spi: cadence-qspi: Add support for octal DTR flashes Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 08/28] arm: mvebu: x530: Use tiny SPI NOR Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 09/28] mtd: spi-nor-core: Fix address width on flash chips > 16MB Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 10/28] mtd: spi-nor-core: Add a ->setup() hook Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 11/28] mtd: spi-nor-core: Move SFDP related declarations to top Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 12/28] mtd: spi-nor-core: Introduce flash-specific fixup hooks Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 13/28] mtd: spi-nor-core: Rework hwcaps selection Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 14/28] mtd: spi-nor-core: Do not set data direction when there is no data Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 15/28] mtd: spi-nor-core: Add support for DTR protocol Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 16/28] mtd: spi-nor-core: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 17/28] mtd: spi-nor-core: Get command opcode extension type from BFPT Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 18/28] mtd: spi-nor-core: Parse xSPI Profile 1.0 table Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 19/28] mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 20/28] mtd: spi-nor-core: Enable octal DTR mode when possible Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 21/28] mtd: spi-nor-core: Do not make invalid quad enable fatal Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 22/28] mtd: spi-nor-core: Detect Soft Reset sequence support from BFPT Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 23/28] mtd: spi-nor-core: Perform a Soft Reset on shutdown Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 24/28] mtd: spi-nor-core: Perform a Soft Reset on boot Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 25/28] mtd: spi-nor-core: allow truncated erases Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 26/28] mtd: spi-nor-core: Add non-uniform erase for Spansion/Cypress Pratyush Yadav
2021-04-06  1:48   ` Takahiro Kuwano
2021-04-06 10:46     ` Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 27/28] mtd: spi-nor-core: Add support for Cypress Semper flash Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 28/28] mtd: spi-nor-core: Allow using Micron mt35xu512aba in Octal DTR mode Pratyush Yadav
2021-04-02 22:28 ` [PATCH v8 00/28] mtd: spi-nor-core: add xSPI Octal DTR support Sean Anderson
2021-04-05  7:43   ` Pratyush Yadav
2021-04-05 13:17     ` Sean Anderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210405114754.GR1310@bill-the-cat \
    --to=trini@konsulko.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox