From: Leo Liang <ycliang@andestech.com>
To: u-boot@lists.denx.de
Subject: [PATCH 01/11] clk: Allow force setting clock defaults before relocation
Date: Mon, 10 May 2021 15:06:41 +0800 [thread overview]
Message-ID: <20210510070634.GA11976@andestech.com> (raw)
In-Reply-To: <20210412035807.708621-2-seanga2@gmail.com>
Hi Sean,
This patch series produces conflicts when applying.
Could you please rebase them? Thanks!
Best regards,
Leo
On Sun, Apr 11, 2021 at 11:57:57PM -0400, Sean Anderson wrote:
> Since 291da96b8e ("clk: Allow clock defaults to be set during re-reloc
> state for SPL only") it has been impossible to set clock defaults before
> relocation. This is annoying on boards without SPL, since there is no way
> to set clock defaults before U-Boot proper. In particular, the aisram rate
> must be changed before relocation on the K210, since U-Boot will hang if we
> try and change the rate while we are using aisram.
>
> To get around this, (ab)use the stage parameter to force setting defaults,
> even if they would be otherwise posponed for later. A device tree property
> was decided against because of the concerns in the original commit thread
> about the overhead of repeatedly parsing the device tree.
>
> Signed-off-by: Sean Anderson <seanga2@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
>
> drivers/clk/clk-uclass.c | 9 +++++++--
> include/clk.h | 4 +++-
> 2 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
> index 53e7be764d..cf8d35b04b 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -353,9 +353,14 @@ int clk_set_defaults(struct udevice *dev, int stage)
> if (!dev_has_ofnode(dev))
> return 0;
>
> - /* If this not in SPL and pre-reloc state, don't take any action. */
> + /*
> + * To avoid setting defaults twice, don't set them before relocation.
> + * However, still set them for SPL. And still set them if explicitly
> + * asked.
> + */
> if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
> - return 0;
> + if (stage <= 1)
> + return 0;
>
> debug("%s(%s)\n", __func__, dev_read_name(dev));
>
> diff --git a/include/clk.h b/include/clk.h
> index ca6b85fa6f..2021eb0506 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -287,7 +287,9 @@ static inline int clk_release_all(struct clk *clk, int count)
> * will be processed).
> * @stage: A integer. 0 indicates that this is called before the device
> * is probed. 1 indicates that this is called just after the
> - * device has been probed
> + * device has been probed. 2 indicates that this is called after
> + * the device has been probed, and that defaults should still be
> + * set even if they would otherwise be ignored.
> */
> int clk_set_defaults(struct udevice *dev, int stage);
> #else
next prev parent reply other threads:[~2021-05-10 7:06 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-12 3:57 [PATCH 00/11] clk: k210: Rewrite K210 clock without CCF Sean Anderson
2021-04-12 3:57 ` [PATCH 01/11] clk: Allow force setting clock defaults before relocation Sean Anderson
2021-04-14 19:38 ` Simon Glass
2021-05-10 7:06 ` Leo Liang [this message]
2021-04-12 3:57 ` [PATCH 02/11] clk: k210: Rewrite to remove CCF Sean Anderson
2021-04-12 3:57 ` [PATCH 03/11] clk: k210: Move pll into the rest of the driver Sean Anderson
2021-04-12 3:58 ` [PATCH 04/11] clk: k210: Implement soc_clk_dump Sean Anderson
2021-04-12 3:58 ` [PATCH 05/11] clk: k210: Re-add support for setting rate Sean Anderson
2021-04-12 3:58 ` [PATCH 06/11] clk: k210: Don't set PLL rates if we are already at the correct rate Sean Anderson
2021-04-12 3:58 ` [PATCH 07/11] clk: k210: Remove bypass driver Sean Anderson
2021-04-12 3:58 ` [PATCH 08/11] clk: k210: Move k210 clock out of its own subdirectory Sean Anderson
2021-04-12 3:58 ` [PATCH 09/11] k210: dts: Set PLL1 to the same rate as PLL0 Sean Anderson
2021-04-12 3:58 ` [PATCH 10/11] k210: Don't imply CCF Sean Anderson
2021-04-12 3:58 ` [PATCH 11/11] test: Add K210 PLL tests to sandbox defconfigs Sean Anderson
2021-04-14 19:38 ` Simon Glass
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