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From: Leo Liang <ycliang@andestech.com>
To: Sean Anderson <seanga2@gmail.com>
Cc: <u-boot@lists.denx.de>
Subject: Re: [PATCH v3 02/11] clk: k210: Rewrite to remove CCF
Date: Wed, 16 Jun 2021 09:54:59 +0800	[thread overview]
Message-ID: <20210616015459.GB6791@andestech.com> (raw)
In-Reply-To: <20210611041617.1665833-3-seanga2@gmail.com>

On Fri, Jun 11, 2021 at 12:16:08PM +0800, Sean Anderson wrote:
> This is effectively a complete rewrite to remove all dependency on CCF.
> The code is now smaller, and so is the binary. It also takes up less memory
> at runtime (since we don't have to create 40 udevices). In general, I am
> much happier with this driver as much of the complexity and late binding
> has been removed.
> 
> The k210_*_params structs which were previously used to initialize CCF
> clocks are now used as the complete configuration. Since we can write our
> own division logic, we can now do away with several "half" clocks which
> only existed to provide constant factors of two.
> 
> The clock IDs have been renumbered to remove unused clocks. This may not be
> the last time they are renumbered, since we have diverged with Linux. There
> are also still a few clocks left out which may need to be added back in.
> 
> In general, I have tried to leave out behavioral changes. However, there is
> a small bugfix regarding ACLK. According to the technical reference manual,
> its mux comes *after* its divider (which is present only for PLL0). This
> would have required yet another intermediate clock to fix with CCF, but
> with the new driver it is just 2 lines of code :)
> 
> Signed-off-by: Sean Anderson <seanga2@gmail.com>
> ---
> 
> (no changes since v1)
> 
>  drivers/clk/kendryte/Kconfig            |   2 +-
>  drivers/clk/kendryte/clk.c              | 848 +++++++++++-------------
>  drivers/clk/kendryte/pll.c              | 114 ++--
>  include/dt-bindings/clock/k210-sysctl.h |  94 ++-
>  include/kendryte/pll.h                  |  26 +-
>  5 files changed, 499 insertions(+), 585 deletions(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

  reply	other threads:[~2021-06-16  1:55 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-11  4:16 [PATCH v3 00/11] clk: k210: Rewrite K210 clock without CCF Sean Anderson
2021-06-11  4:16 ` [PATCH v3 01/11] clk: Allow force setting clock defaults before relocation Sean Anderson
2021-06-11  4:16 ` [PATCH v3 02/11] clk: k210: Rewrite to remove CCF Sean Anderson
2021-06-16  1:54   ` Leo Liang [this message]
2021-06-11  4:16 ` [PATCH v3 03/11] clk: k210: Move pll into the rest of the driver Sean Anderson
2021-06-16  1:55   ` Leo Liang
2021-06-11  4:16 ` [PATCH v3 04/11] clk: k210: Implement soc_clk_dump Sean Anderson
2021-06-16  1:56   ` Leo Liang
2021-06-11  4:16 ` [PATCH v3 05/11] clk: k210: Re-add support for setting rate Sean Anderson
2021-06-16  1:57   ` Leo Liang
2021-06-11  4:16 ` [PATCH v3 06/11] clk: k210: Don't set PLL rates if we are already at the correct rate Sean Anderson
2021-06-16  1:58   ` Leo Liang
2021-06-11  4:16 ` [PATCH v3 07/11] clk: k210: Remove bypass driver Sean Anderson
2021-06-16  1:59   ` Leo Liang
2021-06-11  4:16 ` [PATCH v3 08/11] clk: k210: Move k210 clock out of its own subdirectory Sean Anderson
2021-06-16  2:01   ` Leo Liang
2021-06-11  4:16 ` [PATCH v3 09/11] k210: dts: Set PLL1 to the same rate as PLL0 Sean Anderson
2021-06-16  2:01   ` Leo Liang
2021-06-11  4:16 ` [PATCH v3 10/11] k210: Don't imply CCF Sean Anderson
2021-06-16  2:02   ` Leo Liang
2021-06-11  4:16 ` [PATCH v3 11/11] test: Add K210 PLL tests to sandbox defconfigs Sean Anderson
2021-06-11  8:21 ` [PATCH v3 00/11] clk: k210: Rewrite K210 clock without CCF Lukasz Majewski
2021-06-11 13:57   ` Sean Anderson
2021-06-13 23:08     ` Damien Le Moal
2021-06-11 23:14 ` Sean Anderson

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