From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F874C48BE8 for ; Wed, 16 Jun 2021 01:58:00 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A857061241 for ; Wed, 16 Jun 2021 01:57:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A857061241 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D00D08294C; Wed, 16 Jun 2021 03:57:57 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 57E1780412; Wed, 16 Jun 2021 03:57:56 +0200 (CEST) Received: from ATCSQR.andestech.com (atcsqr.andestech.com [60.248.187.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3FEA48293C for ; Wed, 16 Jun 2021 03:57:53 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (atcpcs16.andestech.com [10.0.1.222]) by ATCSQR.andestech.com with ESMTP id 15G1veH1096387; Wed, 16 Jun 2021 09:57:40 +0800 (GMT-8) (envelope-from ycliang@andestech.com) Received: from andestech.com (10.0.15.65) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Wed, 16 Jun 2021 09:57:38 +0800 Date: Wed, 16 Jun 2021 09:57:39 +0800 From: Leo Liang To: Sean Anderson CC: Subject: Re: [PATCH v3 05/11] clk: k210: Re-add support for setting rate Message-ID: <20210616015738.GE6791@andestech.com> References: <20210611041617.1665833-1-seanga2@gmail.com> <20210611041617.1665833-6-seanga2@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20210611041617.1665833-6-seanga2@gmail.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [10.0.15.65] X-DNSRBL: X-MAIL: ATCSQR.andestech.com 15G1veH1096387 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On Fri, Jun 11, 2021 at 12:16:11PM +0800, Sean Anderson wrote: > This adds support for setting clock rates, which was left out of the > initial CCF expunging. There are several tricky bits here, mostly related > to the PLLS: > > * The PLL's bypass is broken. If the PLL is reconfigured, any child clocks > will be stopped. > * PLL0 is the parent of ACLK which is the CPU and SRAM's clock. To prevent > stopping the CPU while we configure PLL0's rate, ACLK is reparented > to IN0 while PLL0 is disabled. > * PLL1 is the parent of the AISRAM clock. This clock cannot be reparented, > so we instead just disallow changing PLL1's rate after relocation (when > we are using the AISRAM). > > Signed-off-by: Sean Anderson > --- > > Changes in v3: > - Fix inverted condition for setting defaults > - Fix val not being set for K210_DIV_POWER > > Changes in v2: > - Only force probe clocks pre-reloc > > drivers/clk/kendryte/clk.c | 89 +++++++++++++++++++++++++++++++++++--- > 1 file changed, 84 insertions(+), 5 deletions(-) Reviewed-by: Leo Yu-Chi Liang