From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PULL_REQUEST,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7ACF8C48BE5 for ; Wed, 16 Jun 2021 08:28:59 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4765C6101A for ; Wed, 16 Jun 2021 08:28:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4765C6101A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D57E282958; Wed, 16 Jun 2021 10:28:55 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 9EF2E8295B; Wed, 16 Jun 2021 10:28:53 +0200 (CEST) Received: from ATCSQR.andestech.com (exmail.andestech.com [60.248.187.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E2A3A82958 for ; Wed, 16 Jun 2021 10:28:48 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (atcpcs16.andestech.com [10.0.1.222]) by ATCSQR.andestech.com with ESMTP id 15G8SS8B048302; Wed, 16 Jun 2021 16:28:28 +0800 (GMT-8) (envelope-from ycliang@andestech.com) Received: from andestech.com (10.0.15.65) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Wed, 16 Jun 2021 16:28:26 +0800 Date: Wed, 16 Jun 2021 16:28:21 +0800 From: Leo Liang To: Bin Meng , CC: , Subject: Re: [PULL] u-boot-riscv/next Message-ID: <20210616082821.GA19880@andestech.com> References: <20210616074401.GK6791@andestech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [10.0.15.65] X-DNSRBL: X-MAIL: ATCSQR.andestech.com 15G8SS8B048302 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On Wed, Jun 16, 2021 at 04:07:26PM +0800, Bin Meng wrote: > Hi Leo, > > On Wed, Jun 16, 2021 at 3:44 PM Leo Liang wrote: > > > > Hi Tom, > > > > Please pull u-boot-riscv/next into -next. > > > > The following changes on the "next" branch since commit c4737cd594b5c4c47aff789fc53f7dd36ed03c94: > > > > Merge tag 'xilinx-for-v2021.07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-microblaze (2021-06-11 08:29:34 -0400) > > > > are available in the Git repository at: > > > > git@source.denx.de:u-boot/custodians/u-boot-riscv.git > > > > for you to fetch changes up to efbcd66af3c83b14efb72eb38f73cd4af8128208: > > > > test: Add K210 PLL tests to sandbox defconfigs (2021-06-16 10:04:23 +0800) > > > > CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7856 > > > > ---------------------------------------------------------------- > > Bin Meng (6): > > riscv: ae350: dts: Add SPDX license header > > riscv: ae350: dts: Remove the unnecessary space in bootargs > > riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes > > riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit > > riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config > > riscv: ae350: doc: Remove CONFIG_SKIP_LOWLEVEL_INIT > > It seems this patch is missing? > > riscv: andes_plic: Fix riscv_get_ipi() mask > http://patchwork.ozlabs.org/project/uboot/patch/20210615054557.376750-1-bmeng.cn@gmail.com/ > > Regards, > Bin Hi Bin, Sorry, I must have omitted it by accident. Hi Tom, Could you drop this PR ? I will send another one including the patch Bin mentioned. Thanks! Best regards, Leo