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[2603:6081:7b01:cbda:ed48:3ab5:19c4:9a46]) by smtp.gmail.com with ESMTPSA id b21sm6204705qkg.127.2021.06.29.17.52.05 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 29 Jun 2021 17:52:06 -0700 (PDT) Date: Tue, 29 Jun 2021 20:52:04 -0400 From: Tom Rini To: Andre Przywara Cc: Simon Glass , u-boot@lists.denx.de, Linus Walleij , Liviu Dudau Subject: Re: [PATCH] arm: Add (back) VExpress boards support Message-ID: <20210630005204.GC9516@bill-the-cat> References: <20210629114555.20805-1-andre.przywara@arm.com> <20210629121122.GV9516@bill-the-cat> <20210629151552.756ab8b2@slackpad.fritz.box> <20210629175210.1468b1e1@slackpad.fritz.box> <20210629180323.GA9516@bill-the-cat> <20210630011244.09b55fbe@slackpad.fritz.box> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="QrBJAm3yrkuiu97M" Content-Disposition: inline In-Reply-To: <20210630011244.09b55fbe@slackpad.fritz.box> X-Clacks-Overhead: GNU Terry Pratchett User-Agent: Mutt/1.9.4 (2018-02-28) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean --QrBJAm3yrkuiu97M Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jun 30, 2021 at 01:12:44AM +0100, Andre Przywara wrote: > On Tue, 29 Jun 2021 14:03:23 -0400 > Tom Rini wrote: >=20 > Hi Tom, >=20 > > On Tue, Jun 29, 2021 at 05:52:10PM +0100, Andre Przywara wrote: > > > On Tue, 29 Jun 2021 15:15:52 +0100 > > > Andre Przywara wrote: > > >=20 > > > Hi, > > > =20 > > > > On Tue, 29 Jun 2021 08:11:22 -0400 > > > > Tom Rini wrote: > > > > =20 > > > > > On Tue, Jun 29, 2021 at 12:45:55PM +0100, Andre Przywara wrote: > > > > > =20 > > > > > > The v2021.07 merge window saw the removal of the Arm Ltd. Versa= tile > > > > > > Express platform, along with their CA5, CA9 and TC2 boards. The= trigger > > > > > > was the missing conversion of the MMC driver. > > > > > >=20 > > > > > > Some folks complained about that internally, so bring those boa= rds back, > > > > > > but better than ever: > > > > > > - Use DM and OF_CONTROL for all the boards. Use the .dts files = =66rom the > > > > > > latest Linux kernel (5.13) for that. > > > > > > - Move the board selection choice into the platform's Kconfig. > > > > > > - Clean up some shared config and common definitions. > > > > > > - Drop obsolete features like ATAGs support. > > > > > > - Switch to the DM_ETH version of the SMC911X Ethernet driver. > > > > > > - Drop MMC support. > > > > > >=20 > > > > > > The PL180 MMC driver actually supports DM_MMC, but that require= s a > > > > > > DM_GPIO driver for the card detect GPIO, which we don't have. T= his > > > > > > specific GPIO is actually handled via the "sysregs" device, so = we would > > > > > > need a driver for that. QEMU does not emulate this part, also t= he DT > > > > > > description is somewhat "special", so this is left for later. > > > > > >=20 > > > > > > This version compiles without any warning for all three boards = now. > > > > > > Tested on QEMU. > > > > > >=20 > > > > > > Signed-off-by: Andre Przywara > > > > > > --- > > > > > > Hi, > > > > > >=20 > > > > > > this relies on the SMC911x driver DT changes, as posted here: > > > > > > https://lists.denx.de/pipermail/u-boot/2021-June/452989.html > > > > > > I put a version with the changes broken down here: > > > > > > https://github.com/Andre-ARM/u-boot/commits/tc2-history > > > > > >=20 > > > > > > This was tested on QEMU, for vexpress_ca15_tc2_defconfig with: > > > > > > $ qemu-system-arm -M vexpress-a15,secure=3Don -cpu cortex-a15 -= m 1G -smp 1 \ > > > > > > -drive file=3Dtramp-tc2.bin,if=3Dpflash,format=3Draw,read-onl= y \ > > > > > > -device loader,file=3Du-boot.bin,addr=3D0x80800000 -nographic > > > > > >=20 > > > > > > Where tramp-tc2.bin is a trampoline replacing the board's firmw= are: > > > > > > 00000000 00 00 a0 e3 80 00 48 e3 10 ff 2f e1 > > > > > > (mov r0, #0; movt r0, #0x8080; bx r0) > > > > > >=20 > > > > > > The vexpress_ca9x4_defconfig uses a different memory map, so th= e runes are: > > > > > > $ qemu-system-arm -M vexpress-a9 -cpu cortex-a9 -m 1G -smp 1 \ > > > > > > -drive file=3Dtramp-ca9.bin,if=3Dpflash,format=3Draw,read-onl= y \ > > > > > > -device loader,file=3Du-boot.bin,addr=3D0x60800000 -nographic > > > > > >=20 > > > > > > tramp-ca9.bin: > > > > > > 00000000 00 00 a0 e3 80 00 46 e3 10 ff 2f e1 > > > > > > (mov r0, #0; movt r0, #0x6080; bx r0) =20 > > > > >=20 > > > > > My big question is how do we run this in CI? Or does it not _nee= d_ that > > > > > firmware file to really exist? Or is there a pending change to > > > > > https://gitlab.denx.de/u-boot/u-boot-test-hooks.git to generate /= just > > > > > have exist those magic empty bins? Thanks! =20 > > > >=20 > > > > So from digging into this I see that this loads U-Boot's ELF build,= via > > > > QEMU's -kernel parameter. Which is fine, but not really what is > > > > happening on real hardware. > > > > I checked and the v2021.04 version worked with this approach, but my > > > > build does not. > > > > I will have a look into this now. =20 > > >=20 > > > The new build uses OF_CONTROL and OF_SEPARATE, so the DTB gets append= ed > > > to the U-Boot *image*. The ELF file is not treated this way, so the > > > code reads only 0s after the end of the U-Boot code - which makes it > > > die silently. Manually loading the DTB into DRAM would be fragile at > > > best, but is also rejected by QEMU, because the LOAD program header > > > extend for a few dozen bytes beyond U-Boot's "end" symbol, so it > > > overlaps. =20 > >=20 > > Can't we pass the device tree to qemu (and in turn through to U-Boot) in > > a clean and out of the box way? I thought there was a way to do that.. >=20 > QEMU has a -dtb command, to take a DTB file, and puts that at the > beginning of DRAM (if possible). Also we could load the DTB from the > (emulated) NOR flash, like we do for the Juno board. > But I think this is not the point: we don't really want this U-Boot > port for the *QEMU* vexpress machine, but for the real hardware: and > there is no DTB by default, not on the NOR flash, and certainly > not in DRAM. The previous U-Boot port didn't need any DTBs at all, so > we can't and shouldn't rely on any extra firmware provision. > I think appending the DTBs to the U-Boot image is the right solution, > so we get a self-contained U-Boot binary, acting as a drop-in > replacement for the older port. > Running under QEMU should just be a some easy way of CI testing, not > a goal in itself. Hence I'd rather adapt the CI than the code. Ah right, yes, we do want this to look / act as real HW like as possible. > > > IIRC we don't have position independent code for ARM, so we can't load > > > U-Boot into flash directly (which also would require some code changes > > > first). =20 > >=20 > > Do you mean generate a file to use as the system flash and have U-Boot > > be in the correct spot within that file? If so > > bin/travis-ci/conf.qemu_mips_na in the test hooks repo might give you > > some hints. >=20 > Well yes, this was what I was thinking about, but just for the > trampoline. The actual firmware loads U-Boot into DRAM, so we have to > provide that load address in DRAM when building the image. If we were > position independent (like arm64 is), we could cover both cases with > one build, but this is not the case for ARM, IIUC. >=20 > > > Anyway I don't think we should change any code to cope with that (by > > > using another method to find the DTB), so adjusting the QEMU recipe > > > sounds like a better idea. > > >=20 > > > Is there a way to add those 12 byte trampoline files to the CI repo? = Or > > > shall they be created on the fly somehow? =20 > >=20 > > If we need to include the trampoline files, however it's easiest is > > fine. >=20 > So I can try to provide some recipe for travis-ci, based on what I > see in the repo, but don't really know how to test this. I think I have > a Travis-CI account, but would be glad about some hints or instructions > how to test those u-boot-test-hooks bits easily. So, the travis-ci in the paths names is a relic of when we only had Travis-CI as the CI, rather than Azure/GitLab. In terms of testing, you can either push to the sunxi tree which I assume has CI jobs enabled, or a PR on GitHub against the u-boot tree there triggers an Azure run. --=20 Tom --QrBJAm3yrkuiu97M Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmDbwCoACgkQFHw5/5Y0 tyx18wwAiuKMdgi0vA+QeJ5Z2UQKlaFo1v5DDUCr4ifkSisGmZJ2YPazBFelr7tW YCLUOudyxH4rtb4g5UI2KKmySUYizzSGbbukd7snFWgyghWG/0rMTH1iiXrzUADA pOgaCBahkihY9MbqyCqvYsgGaEWZOSIMZkRQ7TrGryxa6NuAJX6jwHLP+3gjm35w Qn0hikDf7MvlnvD2k0Sui5UyAR1Zn5HHbnV5LvKVP67PEyVe62LRPKr+xVjLtSKK /y4OmEEM41hY0TazvcXoqrTkOh5rD0iuqpGJLHR9uwIEm1MqOovDhSLc3dzG4KTO VAy1wHPaLKgxTJogoRxRbYkRxIdwuqUyv4j9h09DCyMDe21PlXmPciiSAInBcWg9 fn9GZ+Uo612WiWOY0ucmSGJ/+CRqesM+mKaZK4CHAjkbv8p7uGAe7vgcu756BOFR LyddOex7daUYxkdG5iXbgPyNx2kmZDqNhbYlCuxVutymRVOj0Q8cK0Mk0Jbe8z4M ScSiqhG7 =vH6j -----END PGP SIGNATURE----- --QrBJAm3yrkuiu97M--