From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_RED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA258C636C9 for ; Thu, 15 Jul 2021 22:59:09 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D36FF601FE for ; Thu, 15 Jul 2021 22:59:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D36FF601FE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A303382E7A; Fri, 16 Jul 2021 00:59:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 78FFB82E88; Fri, 16 Jul 2021 00:59:03 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id D60E982C93 for ; Fri, 16 Jul 2021 00:58:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 06BAD31B; Thu, 15 Jul 2021 15:58:56 -0700 (PDT) Received: from slackpad.fritz.box (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6000E3F694; Thu, 15 Jul 2021 15:58:55 -0700 (PDT) Date: Thu, 15 Jul 2021 23:58:24 +0100 From: Andre Przywara To: Ivan Uvarov Cc: u-boot@lists.denx.de, Chen-Yu Tsai Subject: Re: [PATCH 2/2] arm: allwinner: r40: add devicetree for Forlinx FETA40i-C & OKA40i-C Message-ID: <20210715235824.2a20c170@slackpad.fritz.box> In-Reply-To: <20210715101900.992249-3-i.uvarov@cognitivepilot.com> References: <20210715101900.992249-1-i.uvarov@cognitivepilot.com> <20210715101900.992249-3-i.uvarov@cognitivepilot.com> Organization: Arm Ltd. X-Mailer: Claws Mail 3.17.1 (GTK+ 2.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On Thu, 15 Jul 2021 13:19:00 +0300 Ivan Uvarov wrote: Hi Ivan, thanks for sending this upstream! > The FETA40i-C is a SoM by Forlinx based on the Allwinner R40/A40i. >=20 > SoM specifications: >=20 > - SoC: R40 or A40i > - PMIC: AXP221S > - RAM: 1GiB/2GiB DDR3 (dual-rank) > - eMMC: 8GB, > - Mates with carrier board via four 80-pin connectors (AXK6F80337YG). >=20 > OKA40i-C is a carrier board by the same manufacturer for this SoM, > whose main purpose is as a development board with a wide variety of > peripherals: >=20 > - Power: DC5V barrel or USB OTG or 4.2V Lipo battery > - Video out: HDMI, TV out, LVDS > - WiFi+Bluetooth: RL-UM02WBS-8723BU-V1.2 (802.11 b/g/n, BT V2.1/3.0/4.0) > - Ethernet: 10/100Mbps > - Storage: =C2=B5SD, fullsize SD, eMMC (on SoM), SATA > - USB: 3 x USB2.0 Host (2 via hub, 1 native), 1 x USB2.0 OTG (micro-B) > - UART: RS232, RS485, 4 3.3v uarts (of which 2 have RTS/CTS) > - Other I/O: SPI x2, TWI, SDIO header, GPIO header, JTAG header > - Mini PCIe slot with sim holder for WLAN modem > - Smart card holder > - RTC (RX8010SJ) > - Two user LEDs > - Three user buttons (via KeyADC). >=20 > This patch adds a devicetree for the aforementioned SoM and devboard. > In order to reflect the modularity of this devboard and simplify adding > support for future hardware based on the same SoM, the devicetree is spli= t: > Everything pertaining to the SoM itself is described in a separate .dtsi > file, which is included by the devboard's .dts. So the .dts and .dtsi files are fine, as they are direct copies of the Linux versions. However I am not so happy with the defconfig, see below: >=20 > Signed-off-by: Ivan Uvarov >=20 > 4 files changed, 346 insertions(+), 1 deletion(-) again weird line here ... >=20 > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 9fb38682e6..a6e6fd99c8 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -611,7 +611,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) +=3D \ > sun8i-h3-rervision-dvk.dtb > dtb-$(CONFIG_MACH_SUN8I_R40) +=3D \ > sun8i-r40-bananapi-m2-ultra.dtb \ > - sun8i-v40-bananapi-m2-berry.dtb > + sun8i-v40-bananapi-m2-berry.dtb \ > + sun8i-r40-oka40i-c.dtb > dtb-$(CONFIG_MACH_SUN8I_V3S) +=3D \ > sun8i-s3-pinecube.dtb \ > sun8i-v3s-licheepi-zero.dtb > diff --git a/arch/arm/dts/sun8i-r40-feta40i.dtsi b/arch/arm/dts/sun8i-r40= -feta40i.dtsi > new file mode 100644 > index 0000000000..265e0fa57a > --- /dev/null > +++ b/arch/arm/dts/sun8i-r40-feta40i.dtsi > @@ -0,0 +1,106 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR MIT > +// Copyright (C) 2021 Ivan Uvarov > +// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is: > +// Copyright (C) 2017 Chen-Yu Tsai > +// Copyright (C) 2017 Icenowy Zheng > + > +#include "sun8i-r40.dtsi" > + > +&i2c0 { > + status =3D "okay"; > + > + axp22x: pmic@34 { > + compatible =3D "x-powers,axp221"; > + reg =3D <0x34>; > + interrupt-parent =3D <&nmi_intc>; > + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; > + }; > +}; > + > +#include "axp22x.dtsi" > + > +&mmc2 { > + vmmc-supply =3D <®_dcdc1>; > + vqmmc-supply =3D <®_aldo2>; > + bus-width =3D <8>; > + non-removable; > + status =3D "okay"; > +}; > + > +&pio { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&clk_out_a_pin>; > + vcc-pa-supply =3D <®_dcdc1>; > + vcc-pc-supply =3D <®_aldo2>; > + vcc-pd-supply =3D <®_dcdc1>; > + vcc-pf-supply =3D <®_dldo4>; > + vcc-pg-supply =3D <®_dldo1>; > +}; > + > +®_aldo2 { > + regulator-always-on; > + regulator-min-microvolt =3D <1800000>; > + regulator-max-microvolt =3D <1800000>; > + regulator-name =3D "vcc-pa"; > +}; > + > +®_aldo3 { > + regulator-always-on; > + regulator-min-microvolt =3D <3000000>; > + regulator-max-microvolt =3D <3000000>; > + regulator-name =3D "avcc"; > +}; > + > +®_dcdc1 { > + regulator-always-on; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc-3v3"; > +}; > + > +®_dcdc2 { > + regulator-always-on; > + regulator-min-microvolt =3D <1100000>; > + regulator-max-microvolt =3D <1100000>; > + regulator-name =3D "vdd-cpu"; > +}; > + > +®_dcdc3 { > + regulator-always-on; > + regulator-min-microvolt =3D <1100000>; > + regulator-max-microvolt =3D <1100000>; > + regulator-name =3D "vdd-sys"; > +}; > + > +®_dcdc5 { > + regulator-always-on; > + regulator-min-microvolt =3D <1500000>; > + regulator-max-microvolt =3D <1500000>; > + regulator-name =3D "vcc-dram"; > +}; > + > +®_dldo1 { > + regulator-always-on; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc-wifi-io"; > +}; > + > +®_dldo4 { > + regulator-always-on; > + regulator-min-microvolt =3D <2500000>; > + regulator-max-microvolt =3D <2500000>; > + regulator-name =3D "vdd2v5-sata"; > +}; > + > +®_eldo2 { > + regulator-min-microvolt =3D <1200000>; > + regulator-max-microvolt =3D <1200000>; > + regulator-name =3D "vdd1v2-sata"; > +}; > + > +®_eldo3 { > + regulator-min-microvolt =3D <2800000>; > + regulator-max-microvolt =3D <2800000>; > + regulator-name =3D "vcc-pe"; > +}; > diff --git a/arch/arm/dts/sun8i-r40-oka40i-c.dts b/arch/arm/dts/sun8i-r40= -oka40i-c.dts > new file mode 100644 > index 0000000000..0bd1336206 > --- /dev/null > +++ b/arch/arm/dts/sun8i-r40-oka40i-c.dts > @@ -0,0 +1,203 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR MIT > +// Copyright (C) 2021 Ivan Uvarov > +// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is: > +// Copyright (C) 2017 Chen-Yu Tsai > +// Copyright (C) 2017 Icenowy Zheng > + > +/dts-v1/; > +#include "sun8i-r40-feta40i.dtsi" > + > +#include > +#include > + > +/ { > + model =3D "Forlinx OKA40i-C"; > + compatible =3D "forlinx,oka40i-c", "forlinx,feta40i-c", "allwinner,sun8= i-r40"; > + > + aliases { > + ethernet0 =3D &gmac; > + serial0 =3D &uart0; > + serial2 =3D &uart2; > + serial3 =3D &uart3; > + serial4 =3D &uart4; > + serial5 =3D &uart5; /* RS485 */ > + serial7 =3D &uart7; > + }; > + > + chosen { > + stdout-path =3D "serial0:115200n8"; > + }; > + > + connector { > + compatible =3D "hdmi-connector"; > + type =3D "a"; > + > + port { > + hdmi_con_in: endpoint { > + remote-endpoint =3D <&hdmi_out_con>; > + }; > + }; > + }; > + > + leds { > + compatible =3D "gpio-leds"; > + > + led-5 { /* this is how the leds are labeled on the board */ > + gpios =3D <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */ > + color =3D ; > + function =3D LED_FUNCTION_STATUS; > + }; > + > + led-6 { > + gpios =3D <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */ > + color =3D ; > + function =3D LED_FUNCTION_STATUS; > + }; > + }; > + > + reg_vcc5v0: vcc5v0 { > + compatible =3D "regulator-fixed"; > + regulator-name =3D "vcc5v0"; > + regulator-min-microvolt =3D <5000000>; > + regulator-max-microvolt =3D <5000000>; > + }; > + > + wifi_pwrseq: wifi_pwrseq { > + compatible =3D "mmc-pwrseq-simple"; > + reset-gpios =3D <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN > + clocks =3D <&ccu CLK_OUTA>; > + clock-names =3D "ext_clock"; > + }; > +}; > + > +&ahci { > + ahci-supply =3D <®_dldo4>; > + phy-supply =3D <®_eldo2>; > + status =3D "okay"; > +}; > + > +&de { > + status =3D "okay"; > +}; > + > +&ehci1 { > + status =3D "okay"; > +}; > + > +&ehci2 { > + status =3D "okay"; > +}; > + > +&gmac { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&gmac_rgmii_pins>; > + phy-handle =3D <&phy1>; > + phy-mode =3D "rgmii-id"; > + phy-supply =3D <®_dcdc1>; > + status =3D "okay"; > +}; > + > +&gmac_mdio { > + phy1: ethernet-phy@1 { > + compatible =3D "ethernet-phy-ieee802.3-c22"; > + reg =3D <1>; > + }; > +}; > + > +&hdmi { > + status =3D "okay"; > +}; > + > +&hdmi_out { > + hdmi_out_con: endpoint { > + remote-endpoint =3D <&hdmi_con_in>; > + }; > +}; > + > +&i2c2 { > + status =3D "okay"; > +}; > + > +&mmc0 { > + vmmc-supply =3D <®_dcdc1>; > + vqmmc-supply =3D <®_dcdc1>; > + bus-width =3D <4>; > + cd-gpios =3D <&pio 8 11 GPIO_ACTIVE_LOW>; // PI11 > + status =3D "okay"; > +}; > + > +&mmc3 { > + vmmc-supply =3D <®_dcdc1>; > + vqmmc-supply =3D <®_dcdc1>; > + bus-width =3D <4>; > + cd-gpios =3D <&pio 8 10 GPIO_ACTIVE_LOW>; // PI10 > + status =3D "okay"; > +}; > + > +&ohci1 { > + status =3D "okay"; > +}; > + > +&ohci2 { > + status =3D "okay"; > +}; > + > +®_dc1sw { > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc-lcd"; > +}; > + > +®_dldo2 { > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc-wifi"; > +}; > + > +&tcon_tv0 { > + status =3D "okay"; > +}; > + > +&uart0 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart0_pb_pins>; > + status =3D "okay"; > +}; > + > +&uart2 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart2_pi_pins>, <&uart2_rts_cts_pi_pins>; > + uart-has-rtscts; > + status =3D "okay"; > +}; > + > +&uart3 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>; > + uart-has-rtscts; > + status =3D "okay"; > +}; > + > +&uart4 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart4_pg_pins>; > + status =3D "okay"; > +}; > + > +&uart5 { /* RS485 */ > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart5_ph_pins>; > + status =3D "okay"; > +}; > + > +&uart7 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart7_pi_pins>; > + status =3D "okay"; > +}; > + > +&usbphy { > + usb1_vbus-supply =3D <®_vcc5v0>; > + usb2_vbus-supply =3D <®_vcc5v0>; > + status =3D "okay"; > +}; > diff --git a/configs/OKA40i_defconfig b/configs/OKA40i_defconfig > new file mode 100644 > index 0000000000..fbd54e3843 > --- /dev/null > +++ b/configs/OKA40i_defconfig > @@ -0,0 +1,35 @@ > +CONFIG_ARM=3Dy > +CONFIG_ARCH_SUNXI=3Dy > +CONFIG_SPL=3Dy > +CONFIG_MACH_SUN8I_R40=3Dy > +CONFIG_DRAM_CLK=3D576 > +# CONFIG_DRAM_ZQ=3D0x003b3bfb > +#CONFIG_DRAM_EMR1=3D4 > +#CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=3Dy What are all those commented lines about? > +CONFIG_MMC0_CD_PIN=3D"PI11" > +CONFIG_MMC3_CD_PIN=3D"PI10" > +CONFIG_USB0_VBUS_DET=3D"PH17" > +CONFIG_USB0_VBUS_PIN=3D"PH13" > +CONFIG_USB0_ID_DET=3D"PH21" > +CONFIG_USB1_VBUS_PIN=3D"" > +CONFIG_USB2_VBUS_PIN=3D"" > +#CONFIG_USB1_VBUS_PIN=3D"PH23" > +#CONFIG_DEFAULT_DEVICE_TREE=3D"sun8i-r40-feta40i-c" same here > +CONFIG_DEFAULT_DEVICE_TREE=3D"sun8i-r40-oka40i-c" > +CONFIG_MMC_SUNXI_SLOT_EXTRA=3D2 > +# CONFIG_AHCI=3Dy Why is this disabled? I think you need all of CONFIG_AHCI, CONFIG_SCSI_AHCI and CONFIG_SCSI for SATA to work? > +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > +CONFIG_SPL_I2C_SUPPORT=3Dy > +# CONFIG_SCSI_AHCI=3Dy > +CONFIG_RGMII=3Dy > +CONFIG_SUN4I_EMAC=3Dy While the R40 might have this IP, this doesn't work without the respective DT node, does it? And I don't see a second Ethernet connector on the board, so would this actually be usable on this hardware? Does the board expose the PH MII pins somewhere, so that one could connect a PHY and use EMAC and GMAC at the same time? > +CONFIG_SUNXI_GMAC=3Dy This one does not exist? > +CONFIG_SUN8I_EMAC=3Dy > +CONFIG_AXP_ALDO2_VOLT=3D1800 > +CONFIG_AXP_DLDO4_VOLT=3D2500 > +#CONFIG_AXP_ELDO3_VOLT=3D1200 > +CONFIG_AXP_ELDO2_VOLT=3D1200 > +CONFIG_SCSI=3Dy > +CONFIG_USB_EHCI_HCD=3Dy > +CONFIG_USB_OHCI_HCD=3Dy > +CONFIG_RTC_DRV_RX8010=3Dy In general remove everything that is "=3Dy", but commented. An easy way to get the shortest defconfig is: $ make OKA40i_defconfig $ make savedefconfig $ cp defconfig configs/OKA40i_defconfig The latter will be done automatically at some point anyway, so you could start clean as well. Cheers, Andre