From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76CDDC07E95 for ; Tue, 20 Jul 2021 07:01:37 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 991BE61164 for ; Tue, 20 Jul 2021 07:01:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 991BE61164 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 605FC82BF7; Tue, 20 Jul 2021 09:01:34 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 8769882314; Tue, 20 Jul 2021 09:01:33 +0200 (CEST) Received: from twspam01.aspeedtech.com (twspam01.aspeedtech.com [211.20.114.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9AAEF82314 for ; Tue, 20 Jul 2021 09:01:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=chiawei_wang@aspeedtech.com Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 16K6j1te041357 for ; Tue, 20 Jul 2021 14:45:01 +0800 (GMT-8) (envelope-from chiawei_wang@aspeedtech.com) Received: from ChiaWeiWang-PC.aspeed.com (192.168.2.66) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 20 Jul 2021 15:01:27 +0800 From: Chia-Wei Wang To: CC: Subject: [PATCH] reset: ast2600: Fix missing reference operator Date: Tue, 20 Jul 2021 15:01:36 +0800 Message-ID: <20210720070136.2387-1-chiawei_wang@aspeedtech.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.2.66] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 16K6j1te041357 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Fix missing reference operator '&' to correctly get HW register addresses for writel(). Signed-off-by: Chia-Wei Wang --- drivers/reset/reset-ast2600.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c index f64adaf74e..195ddd18e0 100644 --- a/drivers/reset/reset-ast2600.c +++ b/drivers/reset/reset-ast2600.c @@ -41,9 +41,9 @@ static int ast2600_reset_assert(struct reset_ctl *reset_ctl) debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); if (reset_ctl->id < 32) - writel(BIT(reset_ctl->id), scu->modrst_ctrl1); + writel(BIT(reset_ctl->id), &scu->modrst_ctrl1); else - writel(BIT(reset_ctl->id - 32), scu->modrst_ctrl2); + writel(BIT(reset_ctl->id - 32), &scu->modrst_ctrl2); return 0; } @@ -56,9 +56,9 @@ static int ast2600_reset_deassert(struct reset_ctl *reset_ctl) debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); if (reset_ctl->id < 32) - writel(BIT(reset_ctl->id), scu->modrst_clr1); + writel(BIT(reset_ctl->id), &scu->modrst_clr1); else - writel(BIT(reset_ctl->id - 32), scu->modrst_clr2); + writel(BIT(reset_ctl->id - 32), &scu->modrst_clr2); return 0; } -- 2.17.1