[PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register

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From: "Pali Rohár" <pali@kernel.org>
To: Stefan Roese <sr@denx.de>,
	Chris Packham <judge.packham@gmail.com>,
	Baruch Siach <baruch@tkos.co.il>,
	Dirk Eibach <dirk.eibach@gdsys.cc>,
	u-boot@lists.denx.de
Cc: "Marek Behún" <marek.behun@nic.cz>,
	"Dennis Gilmore" <dgilmore@redhat.com>,
	"Mario Six" <mario.six@gdsys.cc>,
	"Jon Nettleton" <jon@solid-run.com>
Subject: [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register
Date: Sat, 31 Jul 2021 14:22:52 +0200	[thread overview]
Message-ID: <20210731122256.6546-2-pali@kernel.org> (raw)
In-Reply-To: <20210731122256.6546-1-pali@kernel.org>

Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz.
Use this information instead of manual configuration in every board file.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 arch/arm/mach-mvebu/include/mach/soc.h | 13 ++++++++-----
 include/configs/clearfog.h             |  1 -
 include/configs/controlcenterdc.h      |  2 --
 include/configs/db-88f6820-amc.h       |  2 --
 include/configs/db-88f6820-gp.h        |  2 --
 include/configs/helios4.h              |  1 -
 include/configs/turris_omnia.h         |  1 -
 include/configs/x530.h                 |  2 --
 8 files changed, 8 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 3f3b15aa8ab6..cb323aa59a76 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -33,11 +33,6 @@
 #define MV_88F68XX_A0_ID	0x4
 #define MV_88F68XX_B0_ID	0xa
 
-/* TCLK Core Clock definition */
-#ifndef CONFIG_SYS_TCLK
-#define CONFIG_SYS_TCLK		250000000	/* 250MHz */
-#endif
-
 /* SOC specific definations */
 #define INTREG_BASE		0xd0000000
 #define INTREG_BASE_ADDR_REG	(INTREG_BASE + 0x20080)
@@ -170,6 +165,9 @@
 #define BOOT_FROM_SPI		0x32
 #define BOOT_FROM_MMC		0x30
 #define BOOT_FROM_MMC_ALT	0x31
+
+#define CONFIG_SYS_TCLK		((readl(CONFIG_SAR_REG) & BIT(15)) ? \
+				 200000000 : 250000000)
 #elif defined(CONFIG_ARMADA_MSYS)
 /* SAR values for MSYS */
 #define CONFIG_SAR_REG		(MBUS_DFX_BASE  + 0xf8200)
@@ -207,4 +205,9 @@
 #define BOOT_FROM_SPI		0x3
 #endif
 
+/* TCLK Core Clock definition */
+#ifndef CONFIG_SYS_TCLK
+#define CONFIG_SYS_TCLK		250000000	/* 250MHz */
+#endif
+
 #endif /* _MVEBU_SOC_H */
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index fbdd2f0a244c..705217067b30 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -17,7 +17,6 @@
  * for DDR ECC byte filling in the SPL before loading the main
  * U-Boot into it.
  */
-#define CONFIG_SYS_TCLK		250000000	/* 250MHz */
 
 /* USB/EHCI configuration */
 #define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
index e81d05aa2e83..d9802d2a3b8d 100644
--- a/include/configs/controlcenterdc.h
+++ b/include/configs/controlcenterdc.h
@@ -20,8 +20,6 @@
  * U-Boot into it.
  */
 
-#define CONFIG_SYS_TCLK		250000000	/* 250MHz */
-
 #define CONFIG_LOADADDR 		1000000
 
 /*
diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h
index 757fbc0b9bcd..83f5b71839e2 100644
--- a/include/configs/db-88f6820-amc.h
+++ b/include/configs/db-88f6820-amc.h
@@ -10,8 +10,6 @@
  * High Level Configuration Options (easy to change)
  */
 
-#define CONFIG_SYS_TCLK		200000000	/* 200MHz */
-
 /* USB/EHCI configuration */
 #define CONFIG_EHCI_IS_TDI
 
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index d50eb2c12011..feab46cbcbc5 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -10,8 +10,6 @@
  * High Level Configuration Options (easy to change)
  */
 
-#define CONFIG_SYS_TCLK		250000000	/* 250MHz */
-
 /* I2C */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MVTWSI
diff --git a/include/configs/helios4.h b/include/configs/helios4.h
index 1368080f036b..b5814ed55cf2 100644
--- a/include/configs/helios4.h
+++ b/include/configs/helios4.h
@@ -17,7 +17,6 @@
  * for DDR ECC byte filling in the SPL before loading the main
  * U-Boot into it.
  */
-#define CONFIG_SYS_TCLK		250000000	/* 250MHz */
 
 /* USB/EHCI configuration */
 #define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
index 0a824b79397c..18b9861160b0 100644
--- a/include/configs/turris_omnia.h
+++ b/include/configs/turris_omnia.h
@@ -16,7 +16,6 @@
  * for DDR ECC byte filling in the SPL before loading the main
  * U-Boot into it.
  */
-#define CONFIG_SYS_TCLK		250000000	/* 250MHz */
 
 /* USB/EHCI configuration */
 #define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/x530.h b/include/configs/x530.h
index 515c6e7ff45c..64d68276234c 100644
--- a/include/configs/x530.h
+++ b/include/configs/x530.h
@@ -12,8 +12,6 @@
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 
-#define CONFIG_SYS_TCLK		250000000	/* 250MHz */
-
 /*
  * NS16550 Configuration
  */
-- 
2.20.1

next prev parent reply	other threads:[~2021-07-31 12:23 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-31 12:22 [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Pali Rohár
2021-07-31 12:22 ` Pali Rohár [this message]
2021-08-02  6:33   ` [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register Stefan Roese
2021-07-31 12:22 ` [PATCH 2/5] arm: mvebu: a37x: " Pali Rohár
2021-08-02  6:33   ` Stefan Roese
2021-07-31 12:22 ` [PATCH 3/5] arm: mvebu: msys: Set CONFIG_SYS_TCLK globally Pali Rohár
2021-08-02  6:34   ` Stefan Roese
2021-07-31 12:22 ` [PATCH 4/5] arm: mvebu: axp: " Pali Rohár
2021-08-02  6:35   ` Stefan Roese
2021-07-31 12:22 ` [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK Pali Rohár
2021-08-01  8:07   ` Chris Packham
2021-08-01 10:25     ` Pali Rohár
2022-08-16  9:37       ` Michael Walle
2022-08-16 18:17         ` Pali Rohár
2022-08-16 19:38           ` Pali Rohár
2022-08-16 20:02             ` Pali Rohár
2022-08-16 20:06             ` Michael Walle
2022-08-16 20:05           ` Michael Walle
2021-08-02  6:35   ` Stefan Roese
2021-08-11  8:27 ` [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Stefan Roese

find likely ancestor, descendant, or conflicting patches for this message:
( dfblob:3f3b15aa8ab dfblob:cb323aa59a7 dfblob:fbdd2f0a244
dfblob:705217067b3 dfblob:e81d05aa2e8 dfblob:d9802d2a3b8
dfblob:757fbc0b9bc dfblob:83f5b71839e dfblob:d50eb2c1201
dfblob:feab46cbcbc dfblob:1368080f036 dfblob:b5814ed55cf
dfblob:0a824b79397 dfblob:18b9861160b dfblob:515c6e7ff45
dfblob:64d68276234 )
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bs:"[PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register" )
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