From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C440C4338F for ; Sat, 31 Jul 2021 12:23:59 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CA12B60F35 for ; Sat, 31 Jul 2021 12:23:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org CA12B60F35 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2E46783219; Sat, 31 Jul 2021 14:23:48 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="rJluUKyB"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id CE62383251; Sat, 31 Jul 2021 14:23:33 +0200 (CEST) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 913DD83201 for ; Sat, 31 Jul 2021 14:23:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: by mail.kernel.org (Postfix) with ESMTPSA id 74F7460F94; Sat, 31 Jul 2021 12:23:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1627734204; bh=bvK0xiOLv3KHUgv+CA6HorqiEA571wGmYcUY0d1Ilqo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rJluUKyBeKs6lIPMlIa0K6u/ugQIPXGpg2bNCzJjT+qdxLKxlGOFhiUJCAKBThGuu vlWzAXTRolOO6w5dzYFNmiaETO5rq1NCVWB74k6Wny/6BVWrL+ZXmiF3NPQFUF/She vYV7oNSFvwBFh+e12HAxIUsvdKTsUZcVJILHwg8UrK3iUR91mFPLavlYRwuo4Rbazt btBSruUXsVHtf4DYslyRpJYNNDIlItzmZUKLi1oEwdSt4EW0u/oS48sXM04OBINNGl /YE/NMLwRiNZwSLYS+hKE56WAn7amdxAPn2Zad5x4evaH9gtL56EAMXO6KH19C1lnx kvXt/rIpuGbLQ== Received: by pali.im (Postfix) id 9CAC7F92; Sat, 31 Jul 2021 14:23:22 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese , Chris Packham , Baruch Siach , Dirk Eibach , u-boot@lists.denx.de Cc: =?UTF-8?q?Marek=20Beh=C3=BAn?= , Dennis Gilmore , Mario Six , Jon Nettleton Subject: [PATCH 2/5] arm: mvebu: a37x: Detect CONFIG_SYS_TCLK from SAR register Date: Sat, 31 Jul 2021 14:22:53 +0200 Message-Id: <20210731122256.6546-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210731122256.6546-1-pali@kernel.org> References: <20210731122256.6546-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Bit 20 in SAR register specifies if TCLK is running at 200 MHz or 166 MHz. Use this information instead of manual configuration in every board file. Signed-off-by: Pali Rohár --- arch/arm/mach-mvebu/include/mach/soc.h | 3 +++ include/configs/db-88f6720.h | 1 - 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index cb323aa59a76..eb6906ad8027 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -145,6 +145,9 @@ #define BOOT_FROM_UART 0x30 #define BOOT_FROM_SPI 0x38 + +#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(20)) ? \ + 200000000 : 166000000) #elif defined(CONFIG_ARMADA_38X) /* SAR values for Armada 38x */ #define CONFIG_SAR_REG (MVEBU_REGISTER(0x18600)) diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index cbb9270f9327..67d8cd42d1c2 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -15,7 +15,6 @@ * for DDR ECC byte filling in the SPL before loading the main * U-Boot into it. */ -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */ /* I2C */ #define CONFIG_SYS_I2C -- 2.20.1