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[67.190.101.114]) by smtp.gmail.com with ESMTPSA id s2sm1452616ooc.15.2021.08.01.17.54.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 17:54:52 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Tom Rini , Simon Glass Subject: [PATCH v2 04/32] pci: Remove guard around compatibility functions Date: Sun, 1 Aug 2021 18:54:17 -0600 Message-Id: <20210802005446.2267075-5-sjg@chromium.org> X-Mailer: git-send-email 2.32.0.554.ge1b32706d8-goog In-Reply-To: <20210802005446.2267075-1-sjg@chromium.org> References: <20210802005446.2267075-1-sjg@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean This prevents use of IS_ENABLED() in other files. Functions should be visible in headers even if they are not available at link time. Fix it. Signed-off-by: Simon Glass --- (no changes since v1) include/pci.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/include/pci.h b/include/pci.h index e07d6c31bc1..ca086420ff2 100644 --- a/include/pci.h +++ b/include/pci.h @@ -789,7 +789,6 @@ extern void pci_mpc85xx_init (struct pci_controller *hose); extern void imx_pcie_remove(void); #endif -#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) /** * pci_write_bar32() - Write the address of a BAR including control bits * @@ -797,6 +796,8 @@ extern void imx_pcie_remove(void); * with devices which require hard-coded addresses, not part of the normal * PCI enumeration process. * + * This is only available if CONFIG_DM_PCI_COMPAT is enabled + * * @hose: PCI hose to use * @dev: PCI device to update * @barnum: BAR number (0-5) @@ -808,6 +809,8 @@ void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum, /** * pci_read_bar32() - read the address of a bar * + * This is only available if CONFIG_DM_PCI_COMPAT is enabled + * * @hose: PCI hose to use * @dev: PCI device to inspect * @barnum: BAR number (0-5) @@ -818,6 +821,8 @@ u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum); /** * pci_hose_find_devices() - Find devices by vendor/device ID * + * This is only available if CONFIG_DM_PCI_COMPAT is enabled + * * @hose: PCI hose to search * @busnum: Bus number to search * @ids: PCI vendor/device IDs to look for, terminated by 0, 0 record @@ -828,7 +833,6 @@ u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum); */ pci_dev_t pci_hose_find_devices(struct pci_controller *hose, int busnum, struct pci_device_id *ids, int *indexp); -#endif /* !CONFIG_DM_PCI || CONFIG_DM_PCI_COMPAT */ /* Access sizes for PCI reads and writes */ enum pci_size_t { -- 2.32.0.554.ge1b32706d8-goog