From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT, USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05EDFC4338F for ; Tue, 17 Aug 2021 19:48:22 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BF7E76102A for ; Tue, 17 Aug 2021 19:48:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org BF7E76102A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.microsoft.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 000D882054; Tue, 17 Aug 2021 21:48:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linux.microsoft.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=linux.microsoft.com header.i=@linux.microsoft.com header.b="db1NchCr"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id D3BD682C04; Tue, 17 Aug 2021 21:48:14 +0200 (CEST) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by phobos.denx.de (Postfix) with ESMTP id D218F8020E for ; Tue, 17 Aug 2021 21:48:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linux.microsoft.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=stcarlso@linux.microsoft.com Received: from ovlvm104.redmond.corp.microsoft.com (unknown [131.107.160.75]) by linux.microsoft.com (Postfix) with ESMTPSA id CFF5220C30EE; Tue, 17 Aug 2021 12:48:10 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com CFF5220C30EE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1629229690; bh=A4tviosNgfWsEoTl3ocAp/a04K5b0LdZhJ6tMUnDTys=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=db1NchCrUN20tyyR1b5F1szQHtpI28Pu+pWD9nrtQDH6kdwXdMWQDKoQa4BrfBqON zSIF+aT0rJyNxH8W5ujK3EtRGDZpGKwQJJHOuBX4wNd/T/fpgbpL7JiknWIRQDMAyX QYjD6nXdmb7axy3TJrg1EOPVM7qRyVciREgbwpdo= From: stcarlso@linux.microsoft.com To: u-boot@lists.denx.de Cc: Stephen Carlson , Peng Fan , Jaehoon Chung Subject: [PATCH 2/2] drivers: mmc: Add wait_dat0 support for sdhci driver Date: Tue, 17 Aug 2021 12:46:41 -0700 Message-Id: <20210817194641.2269-3-stcarlso@linux.microsoft.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210817194641.2269-1-stcarlso@linux.microsoft.com> References: <20210817194641.2269-1-stcarlso@linux.microsoft.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Stephen Carlson Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI driver, allowing the driver to continue when the card is ready rather than waiting for the worst case time on each MMC switch operation. Signed-off-by: Stephen Carlson --- drivers/mmc/sdhci.c | 20 ++++++++++++++++++++ include/sdhci.h | 2 ++ 2 files changed, 22 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index eea4701d8a..bb55e00ef5 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -775,6 +775,25 @@ static int sdhci_get_cd(struct udevice *dev) return value; } +static int sdhci_wait_dat0(struct udevice *dev, int state, + int timeout_us) +{ + int tmp; + struct mmc *mmc = mmc_get_mmc_dev(dev); + struct sdhci_host *host = mmc->priv; + unsigned long timeout = timer_get_us() + timeout_us; + + // readx_poll_timeout is unsuitable because sdhci_readl accepts + // two arguments + do { + tmp = sdhci_readl(host, SDHCI_PRESENT_STATE); + if (!!(tmp & SDHCI_DATA_0_LVL_MASK) == !!state) + return 0; + } while (!timeout_us || !time_after(timer_get_us(), timeout)); + + return -ETIMEDOUT; +} + const struct dm_mmc_ops sdhci_ops = { .send_cmd = sdhci_send_command, .set_ios = sdhci_set_ios, @@ -783,6 +802,7 @@ const struct dm_mmc_ops sdhci_ops = { #ifdef MMC_SUPPORTS_TUNING .execute_tuning = sdhci_execute_tuning, #endif + .wait_dat0 = sdhci_wait_dat0, }; #else static const struct mmc_ops sdhci_ops = { diff --git a/include/sdhci.h b/include/sdhci.h index 0ae9471ad7..dd4eb41442 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -65,6 +65,8 @@ #define SDHCI_CARD_STATE_STABLE BIT(17) #define SDHCI_CARD_DETECT_PIN_LEVEL BIT(18) #define SDHCI_WRITE_PROTECT BIT(19) +#define SDHCI_DATA_LVL_MASK 0x00F00000 +#define SDHCI_DATA_0_LVL_MASK BIT(20) #define SDHCI_HOST_CONTROL 0x28 #define SDHCI_CTRL_LED BIT(0) -- 2.17.1