From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5787EC432BE for ; Wed, 25 Aug 2021 18:55:23 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DFF04610CB for ; Wed, 25 Aug 2021 18:55:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org DFF04610CB Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0D5A3829C6; Wed, 25 Aug 2021 20:55:19 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 996A881EBD; Wed, 25 Aug 2021 20:55:17 +0200 (CEST) Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D0AAC82BFA for ; Wed, 25 Aug 2021 20:55:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=clement.leger@bootlin.com Received: (Authenticated sender: clement.leger@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id 335171C0005; Wed, 25 Aug 2021 18:55:11 +0000 (UTC) Date: Wed, 25 Aug 2021 20:55:09 +0200 From: =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= To: Cc: Subject: Re: [PATCH] ARM: mach-at91: fix multiple cpu_reset definition when enabling SYSRESET Message-ID: <20210825205509.0f72e1ec@fixe.home> In-Reply-To: <03f88607-a791-a948-578f-759de4b038e3@microchip.com> References: <20210804145544.1105468-1-clement.leger@bootlin.com> <20210824113727.66d1952b@fixe.home> <03f88607-a791-a948-578f-759de4b038e3@microchip.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.8 (GTK+ 2.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Le Tue, 24 Aug 2021 09:51:24 +0000, a =C3=A9crit : > On 8/24/21 12:37 PM, Cl=C3=A9ment L=C3=A9ger wrote: > > Le Mon, 23 Aug 2021 07:42:58 +0000, > > a =C3=A9crit : > > =20 > >> On 8/4/21 5:55 PM, Cl=C3=A9ment L=C3=A9ger wrote: =20 > >>> When SYSRESET is enabled, cpu_reset function is also defined in > >>> sysreset-uclass.c which lead to multiple definitions of this > >>> function since reset.c is build unconditionally. Add a check in > >>> Makefile to build this file only if SYSRESET isn't enabled. > >>> SYSRESET can be enabled when building SYSRESET_PSCI for instance > >>> on this platform. =20 > >> > >> Hello Clement, > >> > >> Does this mean that in fact, the cpu_reset function from the > >> reset.c file has to be implemented as a reset driver in the > >> sysreset uclass ? =20 > >=20 > > Hello Eugen, > >=20 > > In fact, when SYSRESET is selected, the reset_cpu function is > > defined in sysreset-uclass.c. This function will then call the > > appropriate reset function according to registered reset drivers. =20 >=20 > Yes, so, my assumption is then correct, the cpu_reset from reset.c=20 > should be converted to a real driver that has to be registered with > the sysreset-uclass . Oh yes, sorry I did not understood you were talking about converting the sama5d2 reset driver to a read sysreset driver. >=20 > Meanwhile, I guess it's fine to avoid build errors when selecting the=20 > SYSRESET from menuconfig, so I will apply your patch. I wanted to > make sure I fully understand the situation there. Yes, this allows to build using another sysreset driver in the meantime. Cl=C3=A9ment >=20 > Eugen >=20 > >=20 > > Cl=C3=A9ment > > =20 > >> > >> Eugen > >> =20 > >>> > >>> Signed-off-by: Cl=C3=A9ment L=C3=A9ger > >>> --- > >>> arch/arm/mach-at91/armv7/Makefile | 4 +++- > >>> 1 file changed, 3 insertions(+), 1 deletion(-) > >>> > >>> diff --git a/arch/arm/mach-at91/armv7/Makefile > >>> b/arch/arm/mach-at91/armv7/Makefile index f5b2665957..246050b67b > >>> 100644 --- a/arch/arm/mach-at91/armv7/Makefile > >>> +++ b/arch/arm/mach-at91/armv7/Makefile > >>> @@ -11,7 +11,9 @@ obj-$(CONFIG_SAMA5D3) +=3D sama5d3_devices.o > >>> clock.o obj-$(CONFIG_SAMA5D4) +=3D sama5d4_devices.o clock.o > >>> obj-$(CONFIG_SAMA7G5) +=3D sama7g5_devices.o > >>> obj-y +=3D cpu.o > >>> -obj-y +=3D reset.o > >>> +ifndef CONFIG_$(SPL_TPL_)SYSRESET > >>> +obj-y +=3D reset.o > >>> +endif > >>> ifneq ($(CONFIG_ATMEL_PIT_TIMER),y) > >>> ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y) > >>> # old non-DM timer driver > >>> -- > >>> 2.32.0 > >>> =20 > >> =20 > >=20 > >=20 > >=20 > > -- > > Cl=C3=A9ment L=C3=A9ger, > > Embedded Linux and Kernel engineer at Bootlin > > https://bootlin.com > > =20 >=20 --=20 Cl=C3=A9ment L=C3=A9ger, Embedded Linux and Kernel engineer at Bootlin https://bootlin.com