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[2603:6081:7b01:cbda:c0de:1187:e67f:31d5]) by smtp.gmail.com with ESMTPSA id b21sm12337285qte.38.2021.09.01.05.35.35 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 01 Sep 2021 05:35:35 -0700 (PDT) Date: Wed, 1 Sep 2021 08:35:33 -0400 From: Tom Rini To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Stefan Roese , Marek =?iso-8859-1?Q?Beh=FAn?= , u-boot@lists.denx.de Subject: Re: [PATCH v2] arm: mvebu: a37xx: Define CONFIG_SYS_REF_CLK and use it instead of get_ref_clk() Message-ID: <20210901123533.GA858@bill-the-cat> References: <20210811185330.15414-2-pali@kernel.org> <20210816100227.24792-1-pali@kernel.org> <20210901121410.GZ858@bill-the-cat> <20210901123243.qs5ugus36qkbpd4e@pali> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="zaVYwuCcRWkOdXFx" Content-Disposition: inline In-Reply-To: <20210901123243.qs5ugus36qkbpd4e@pali> X-Clacks-Overhead: GNU Terry Pratchett User-Agent: Mutt/1.9.4 (2018-02-28) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean --zaVYwuCcRWkOdXFx Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Sep 01, 2021 at 02:32:43PM +0200, Pali Roh=E1r wrote: > On Wednesday 01 September 2021 08:14:10 Tom Rini wrote: > > On Wed, Sep 01, 2021 at 11:12:58AM +0200, Stefan Roese wrote: > >=20 > > > Hi Pali, > > >=20 > > > On 16.08.21 12:02, Pali Roh=E1r wrote: > > > > Like for all other mvebu platforms with CONFIG_SYS_TCLK macro, defi= ne > > > > CONFIG_SYS_REF_CLK macro for a37xx with base reference clock value = which is > > > > read from latched reset register. > > > >=20 > > > > Replace all usages of get_ref_clk() function by this CONFIG_SYS_REF= _CLK > > > > macro and completely remove get_ref_clk() function. > > > >=20 > > > > Replace also custom open-coded implementation of determining refere= nce > > > > clock by CONFIG_SYS_REF_CLK in a37xx serial driver. > > > >=20 > > > > The only difference is that macro CONFIG_SYS_REF_CLK returns base r= eference > > > > clock in Hz and old function get_ref_clk() returned it in MHz. > > > >=20 > > > > Signed-off-by: Pali Roh=E1r > > > >=20 > > > > --- > > > > Changes in v2: > > > > * Do not remove MVEBU_TEST_PIN_LATCH_N and MVEBU_XTAL_MODE_MASK mac= ros > > >=20 > > > This patch does not apply any more, with all the other patches applie= d. > > > Please wait a bit until these patches are included in master and then > > > send a new version. > > >=20 > > > Sorry for the trouble. > > >=20 > > > Thanks, > > > Stefan > > >=20 > > > > --- > > > > arch/arm/mach-mvebu/armada3700/cpu.c | 24 ---------------------= --- > > > > arch/arm/mach-mvebu/include/mach/cpu.h | 7 ------- > > > > arch/arm/mach-mvebu/include/mach/soc.h | 6 ++++++ > > > > drivers/clk/mvebu/armada-37xx-periph.c | 6 +++--- > > > > drivers/clk/mvebu/armada-37xx-tbg.c | 4 ++-- > > > > drivers/phy/marvell/comphy_a3700.c | 12 ++++++------ > > > > drivers/serial/serial_mvebu_a3700.c | 11 ++++------- > > > > drivers/watchdog/armada-37xx-wdt.c | 2 +- > > > > 8 files changed, 22 insertions(+), 50 deletions(-) > > > >=20 > > > > diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-m= vebu/armada3700/cpu.c > > > > index 7702028ba19b..bdf8dc377528 100644 > > > > --- a/arch/arm/mach-mvebu/armada3700/cpu.c > > > > +++ b/arch/arm/mach-mvebu/armada3700/cpu.c > > > > @@ -23,12 +23,6 @@ > > > > /* Armada 3700 */ > > > > #define MVEBU_GPIO_NB_REG_BASE (MVEBU_REGISTER(0x13800)) > > > > -#define MVEBU_TEST_PIN_LATCH_N (MVEBU_GPIO_NB_REG_BASE + 0x8) > > > > -#define MVEBU_XTAL_MODE_MASK BIT(9) > > > > -#define MVEBU_XTAL_MODE_OFFS 9 > > > > -#define MVEBU_XTAL_CLOCK_25MHZ 0x0 > > > > -#define MVEBU_XTAL_CLOCK_40MHZ 0x1 > > > > - > > > > #define MVEBU_NB_WARM_RST_REG (MVEBU_GPIO_NB_REG_BASE + 0x40) > > > > #define MVEBU_NB_WARM_RST_MAGIC_NUM 0x1d1e > > > > @@ -370,21 +364,3 @@ void reset_cpu(void) > > > > */ > > > > writel(MVEBU_NB_WARM_RST_MAGIC_NUM, MVEBU_NB_WARM_RST_REG); > > > > } > > > > - > > > > -/* > > > > - * get_ref_clk > > > > - * > > > > - * return: reference clock in MHz (25 or 40) > > > > - */ > > > > -u32 get_ref_clk(void) > > > > -{ > > > > - u32 regval; > > > > - > > > > - regval =3D (readl(MVEBU_TEST_PIN_LATCH_N) & MVEBU_XTAL_MODE_MASK)= >> > > > > - MVEBU_XTAL_MODE_OFFS; > > > > - > > > > - if (regval =3D=3D MVEBU_XTAL_CLOCK_25MHZ) > > > > - return 25; > > > > - else > > > > - return 40; > > > > -} > > > > diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach= -mvebu/include/mach/cpu.h > > > > index 79858858c259..9b8907e0fe55 100644 > > > > --- a/arch/arm/mach-mvebu/include/mach/cpu.h > > > > +++ b/arch/arm/mach-mvebu/include/mach/cpu.h > > > > @@ -183,12 +183,5 @@ int a3700_dram_init_banksize(void); > > > > /* A3700 PCIe regions fixer for device tree */ > > > > int a3700_fdt_fix_pcie_regions(void *blob); > > > > -/* > > > > - * get_ref_clk > > > > - * > > > > - * return: reference clock in MHz (25 or 40) > > > > - */ > > > > -u32 get_ref_clk(void); > > > > - > > > > #endif /* __ASSEMBLY__ */ > > > > #endif /* _MVEBU_CPU_H */ > > > > diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach= -mvebu/include/mach/soc.h > > > > index aab61f7c15cf..b03b6de3c6cd 100644 > > > > --- a/arch/arm/mach-mvebu/include/mach/soc.h > > > > +++ b/arch/arm/mach-mvebu/include/mach/soc.h > > > > @@ -210,6 +210,12 @@ > > > > #define BOOT_FROM_SPI 0x3 > > > > #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > > > > +#elif defined(CONFIG_ARMADA_3700) > > > > +/* SAR values for Armada 3700 */ > > > > +#define MVEBU_TEST_PIN_LATCH_N MVEBU_REGISTER(0x13808) > > > > +#define MVEBU_XTAL_MODE_MASK BIT(9) > > > > +#define CONFIG_SYS_REF_CLK ((readl(MVEBU_TEST_PIN_LATCH_N) & MVEBU= _XTAL_MODE_MASK) ? \ > > > > + 40000000 : 25000000) > >=20 > > NAK. CONFIG_xxx which evaluate out to a macro / function are the > > hardest to convert to Kconfig. This patch is taking a step backwards. > > In fact, wait, how does patch apply and work? There are no > > CONFIG_SYS_REF_CLK instances today, so the build should blow up about > > adding a new non-Kconfig symbol. >=20 > So, could you please provide some other solution for this issue which > Marek and Stefan pointed? I don't know what the issue is, sorry. But you cannot do what you're doing there with CONFIG. If for some reason you cannot use an inline function, just don't name it CONFIG_SYS_REF_CLK. But also, really, did your build not fail when you tried to do this? It really should have failed and told you to not add new CONFIG symbols. --=20 Tom --zaVYwuCcRWkOdXFx Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmEvc5EACgkQFHw5/5Y0 tywptQv+JEnEEYfMEUif7+bTST1OjCvN8y/73GAhYIn5P+TSfP/o7bl/UnoPrjSl /BDopeupxURf/4ulmklT266uuRtuSRdTeS6zjbWHWEeRjnQoaktSeK5Qcu4fuB/w QFH0JF7vyseUPTYtJ4vo7DILGaohC0SAb+fZoZ5xSw0T4A2O6u8JZvGr1kEJ62iX DB9dyFrydNLn9gB3qWB6wTXiSCC4AXO6pJtrQzGWW60GYLhcBh0me9hBX/fEsWmJ fzDDt/A/7hPutpRHfpIaBn9qTws5BNlYSHnwV7AVb+mxf7dHzE4Uwk+hsKPx0I6G mZSE+zcvNO9UcZO+5ZVchT3q9XmmkakH3q3qkNL1d11PE9LyVOQYLdBLL/yi6YG0 utDOyIBrJhnYY7fU4igC4iZUNTZkzj/BekHedV/K98y8/bP397z9jSbKith/r03a uDLWt+gO8tg8SNwD1lHpXm0MJvO/6CxgYDwkdGAEZXDvujRSVZMBUAXl/v3E7tsT Pb4Vh8HD =/Rfl -----END PGP SIGNATURE----- --zaVYwuCcRWkOdXFx--