From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D34FAC4332F for ; Wed, 22 Sep 2021 18:52:16 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4A15B61107 for ; Wed, 22 Sep 2021 18:52:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 4A15B61107 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F29C483340; Wed, 22 Sep 2021 20:51:50 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 86C2A83202; Wed, 22 Sep 2021 20:51:16 +0200 (CEST) Received: from mail-qt1-f177.google.com (mail-qt1-f177.google.com [209.85.160.177]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5832D8331F for ; Wed, 22 Sep 2021 20:50:55 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tom.rini@gmail.com Received: by mail-qt1-f177.google.com with SMTP id 2so3754702qtw.1 for ; Wed, 22 Sep 2021 11:50:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=t43mgoG7KQ6rzWkbw3SvbCuJi2jjyJzO6phwDfLWS2Y=; b=Bi/b5xDs7Wbhs+FEZW2efLps9LeU/DyrdUFUi9C6Zm0cWAH0NrMNmgimCUlwyGZm/r 7htsUzYamAh8GPkXEjdo7nqs427Q245F7LzZzi1aIMjTmE4HORBgOlm9hbETJAMpjb8S fprwxx945F43mLOHBapMPmJDeVzY86kiVZ/qR5LFTUxyYhT+mqF6hU25Awutj00OzFW0 DaCfHBes6x0kXtvWYHfjzOjWxhFetZyk3xb/JAPJZSl/Xd7Prm51k8CNGidrHFuooNQU kbSUU46TI+YQHL2Zv4amQqwgpBVkwaseNNhM7gbIPG/Pt9S1T8xyCY6FDtO3IlteFFeo tgOA== X-Gm-Message-State: AOAM531l5b4rfKXl/58K0RfUiIy/fvNS086UeCz6bldESiSOScMaQ1Tk eIxsnJM7QKrvHd1X28uuv83jg0T88g== X-Google-Smtp-Source: ABdhPJxohpLv9hyJrPTjrh0ipEPFFubNZhjFORv4yN85SUuvJX9Wcktn6oKRuvkpRSBSDVIG7xRR1Q== X-Received: by 2002:ac8:4589:: with SMTP id l9mr805365qtn.338.1632336653731; Wed, 22 Sep 2021 11:50:53 -0700 (PDT) Received: from bill-the-cat.lan (2603-6081-7b01-cbda-01ae-c37f-f577-ef41.res6.spectrum.com. [2603:6081:7b01:cbda:1ae:c37f:f577:ef41]) by smtp.gmail.com with ESMTPSA id v24sm2398860qkv.11.2021.09.22.11.50.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Sep 2021 11:50:53 -0700 (PDT) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 11/14] Convert CONFIG_SYS_NAND_MAX_CHIPS to Kconfig Date: Wed, 22 Sep 2021 14:50:36 -0400 Message-Id: <20210922185039.30707-11-trini@konsulko.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210922185039.30707-1-trini@konsulko.com> References: <20210922185039.30707-1-trini@konsulko.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean This converts the following to Kconfig: CONFIG_SYS_NAND_MAX_CHIPS Signed-off-by: Tom Rini --- drivers/mtd/Kconfig | 8 ++++++++ drivers/mtd/nand/raw/Kconfig | 7 ------- include/configs/MCR3000.h | 1 - include/configs/cm_fx6.h | 1 - include/configs/etamin.h | 2 -- include/configs/ids8313.h | 1 - include/configs/mvebu_armada-8k.h | 1 - include/configs/presidio_asic.h | 1 - include/configs/ti_armv7_keystone2.h | 1 - include/linux/mtd/bbm.h | 5 ----- 10 files changed, 8 insertions(+), 20 deletions(-) diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index b303fabe0f05..83c055a26ef5 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -111,6 +111,14 @@ config HBMC_AM654 source "drivers/mtd/nand/Kconfig" +config SYS_NAND_MAX_CHIPS + int "NAND max chips" + depends on MTD_RAW_NAND || CMD_ONENAND || TARGET_S5PC210_UNIVERSAL || \ + SPL_OMAP3_ID_NAND + default 1 + help + The maximum number of NAND chips per device to be supported. + source "drivers/mtd/spi/Kconfig" source "drivers/mtd/ubi/Kconfig" diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 68f909db4c0e..2d67b1b1284e 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -419,13 +419,6 @@ config SYS_NAND_BUSWIDTH_16BIT not available while configuring controller. So a static CONFIG_NAND_xx is needed to know the device's bus-width in advance. -config SYS_NAND_MAX_CHIPS - int "NAND max chips" - default 1 - depends on NAND_ARASAN - help - The maximum number of NAND chips per device to be supported. - if SPL config SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 65c16380ee52..73858c56e515 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -95,7 +95,6 @@ /* NAND configuration part */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0x0C000000 #endif /* __CONFIG_H */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 1d6c77ee8094..c1b6847ef844 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -143,7 +143,6 @@ /* NAND */ #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* APBH DMA is required for NAND support */ #endif diff --git a/include/configs/etamin.h b/include/configs/etamin.h index e1d27ac0c844..229a695c12eb 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -51,8 +51,6 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 - #undef CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_MAX_NAND_DEVICE 3 #define CONFIG_SYS_NAND_BASE2 (0x18000000) /* physical address */ diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 5bd4f3bc8ca4..5e2f377749f0 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -129,7 +129,6 @@ */ #define CONFIG_SYS_NAND_BASE 0xE1000000 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_NAND_FSL_ELBC #define NAND_CACHE_PAGES 64 diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index cb8ccb32f593..2f8be2ee4948 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -33,7 +33,6 @@ /* When runtime detection fails this is the default */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 /* * Ethernet Driver configuration diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index b22e676ee00e..8d689d9e4be1 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -78,7 +78,6 @@ /* nand driver parameters */ #ifdef CONFIG_TARGET_PRESIDIO_ASIC #define CONFIG_SYS_MAX_NAND_DEVICE 1 - #define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #endif diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 690ef0e14471..50d6cef84c25 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -131,7 +131,6 @@ #define CONFIG_SYS_NAND_LARGEPAGE #define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE #define DFU_ALT_INFO_MMC \ diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h index 7239eb1125c7..fb86f1ddef9c 100644 --- a/include/linux/mtd/bbm.h +++ b/include/linux/mtd/bbm.h @@ -15,11 +15,6 @@ #ifndef __LINUX_MTD_BBM_H #define __LINUX_MTD_BBM_H -/* The maximum number of NAND chips in an array */ -#ifndef CONFIG_SYS_NAND_MAX_CHIPS -#define CONFIG_SYS_NAND_MAX_CHIPS 1 -#endif - /** * struct nand_bbt_descr - bad block table descriptor * @options: options for this descriptor -- 2.17.1