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bh=6AdEnbJETqM+JKviRltpBZyq8alUncjOH3kFP25qK7c=; b=sb9JdkAS5k4jcndiK72/YAfZxx8IdLNuMySLYqFZNPtBn2hLWjKBLNkR5mVEM5UX+Y j7hibHFA8QfZlIK+rzKV5XSPlRJKsjMnZ0H4wasiC7T/tupc8hndt8vKG4qbp05NVW18 zR81nnkhl/tPiiPQiQtUakat1fSodj8yQkzLznj4xaBhkqrXZYjXRGKe63WKtXNTPAIR 35IFtM+NHb2FtSlHhIFNe8L1ea1Vo5fmv8ynHkUcmWh8b0m9TOAMfhvtE1Kw2I0nZ3X/ d8KepsVR+BUrumPXSzNMGjbCZSjjfM8As9G95RUCzyB35fOjyXH2IjMgZhRGouIiewGC LXhQ== X-Gm-Message-State: AOAM531Effty5tcKI2sil/82l7VtEffr2Bwq1OcdIRgcYwW/jqHdrIjk +qkCBTIdY8ygitO3rxwf7a0TlQO7/PXs3g== X-Google-Smtp-Source: ABdhPJzf2Q99TLjcWKbIwSXTuJ0L7TnsMrLizWE11GzPalJorYW4Jao5s4IT8OHcinL8bW3+3gCK/g== X-Received: by 2002:a17:906:c205:: with SMTP id d5mr6946066ejz.74.1632423465437; Thu, 23 Sep 2021 11:57:45 -0700 (PDT) Received: from localhost.localdomain ([46.216.16.109]) by smtp.gmail.com with ESMTPSA id l11sm4144943edv.67.2021.09.23.11.57.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Sep 2021 11:57:45 -0700 (PDT) From: dsankouski@gmail.com To: u-boot@lists.denx.de Cc: Dzmitry Sankouski , Ramon Fried , Tom Rini Subject: [PATCH 3/6] pinctrl: qcom: add pinctrl and gpio drivers for SDM845 SoC Date: Thu, 23 Sep 2021 21:57:29 +0300 Message-Id: <20210923185732.7679-4-dsankouski@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210923185732.7679-1-dsankouski@gmail.com> References: <20210923185732.7679-1-dsankouski@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Thu, 23 Sep 2021 21:00:30 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Dzmitry Sankouski Signed-off-by: Dzmitry Sankouski Cc: Ramon Fried Cc: Tom Rini --- arch/arm/mach-snapdragon/pinctrl-sdm845.c | 44 +++++++++++++++++++ arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 1 + arch/arm/mach-snapdragon/pinctrl-snapdragon.h | 1 + drivers/gpio/msm_gpio.c | 1 + drivers/gpio/pm8916_gpio.c | 8 ++-- 5 files changed, 52 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-snapdragon/pinctrl-sdm845.c diff --git a/arch/arm/mach-snapdragon/pinctrl-sdm845.c b/arch/arm/mach-snapdragon/pinctrl-sdm845.c new file mode 100644 index 0000000000..6d66582aa6 --- /dev/null +++ b/arch/arm/mach-snapdragon/pinctrl-sdm845.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm SDM845 pinctrl + * + * (C) Copyright 2021 Dzmitry Sankouski + * + */ + +#include "pinctrl-snapdragon.h" +#include + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN]; + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"qup9", 1}, + {"gpio", 0}, +}; + +static const char *sdm845_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *sdm845_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + return pin_name; +} + +static unsigned int sdm845_get_function_mux(unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +struct msm_pinctrl_data sdm845_data = { + .pin_count = 150, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = sdm845_get_function_name, + .get_function_mux = sdm845_get_function_mux, + .get_pin_name = sdm845_get_pin_name, +}; diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c index e6b87c3573..c0ed943036 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -116,6 +116,7 @@ static struct pinctrl_ops msm_pinctrl_ops = { static const struct udevice_id msm_pinctrl_ids[] = { { .compatible = "qcom,tlmm-apq8016", .data = (ulong)&apq8016_data }, { .compatible = "qcom,tlmm-apq8096", .data = (ulong)&apq8096_data }, + { .compatible = "qcom,tlmm-sdm845", .data = (ulong)&sdm845_data }, { } }; diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h index 61d466f4d8..ea524312a0 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h @@ -27,5 +27,6 @@ struct pinctrl_function { extern struct msm_pinctrl_data apq8016_data; extern struct msm_pinctrl_data apq8096_data; +extern struct msm_pinctrl_data sdm845_data; #endif diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c index e1ff84c1c0..a3c3cd7824 100644 --- a/drivers/gpio/msm_gpio.c +++ b/drivers/gpio/msm_gpio.c @@ -120,6 +120,7 @@ static const struct udevice_id msm_gpio_ids[] = { { .compatible = "qcom,msm8916-pinctrl" }, { .compatible = "qcom,apq8016-pinctrl" }, { .compatible = "qcom,ipq4019-pinctrl" }, + { .compatible = "qcom,sdm845-pinctrl" }, { } }; diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c index 40b0f2578b..7ad95784a8 100644 --- a/drivers/gpio/pm8916_gpio.c +++ b/drivers/gpio/pm8916_gpio.c @@ -202,6 +202,7 @@ static int pm8916_gpio_of_to_plat(struct udevice *dev) static const struct udevice_id pm8916_gpio_ids[] = { { .compatible = "qcom,pm8916-gpio" }, { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */ + { .compatible = "qcom,pm8998-gpio" }, { } }; @@ -266,7 +267,7 @@ static int pm8941_pwrkey_probe(struct udevice *dev) return log_msg_ret("bad type", -ENXIO); reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); - if (reg != 0x1) + if ((reg & 0x5) == 0) return log_msg_ret("bad subtype", -ENXIO); return 0; @@ -287,11 +288,12 @@ static int pm8941_pwrkey_of_to_plat(struct udevice *dev) static const struct udevice_id pm8941_pwrkey_ids[] = { { .compatible = "qcom,pm8916-pwrkey" }, { .compatible = "qcom,pm8994-pwrkey" }, + { .compatible = "qcom,pm8998-pwrkey" }, { } }; -U_BOOT_DRIVER(pwrkey_pm8941) = { - .name = "pwrkey_pm8916", +U_BOOT_DRIVER(pwrkey_pm89xx) = { + .name = "pwrkey_pm89xx", .id = UCLASS_GPIO, .of_match = pm8941_pwrkey_ids, .of_to_plat = pm8941_pwrkey_of_to_plat, -- 2.20.1