[PATCH 2/2] arm: dts: Update IOT2050 device tree files

Jan Kiszka
2021-10-05T10:05:27Z

From: Jan Kiszka <jan.kiszka@siemens.com>

This fixes the usage of the USB 3.0-capable port under U-Boot as USB
2.0-only port.

Original patch by Chao Zeng.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
.../k3-am65-iot2050-common-pg2-u-boot.dtsi | 27 +++++++++++++++++++
arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi | 4 ++-
2 files changed, 30 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/k3-am65-iot2050-common-pg2-u-boot.dtsi

diff --git a/arch/arm/dts/k3-am65-iot2050-common-pg2-u-boot.dtsi b/arch/arm/dts/k3-am65-iot2050-common-pg2-u-boot.dtsi
new file mode 100644
index 0000000000..64dddce648
--- /dev/null
+++ b/arch/arm/dts/k3-am65-iot2050-common-pg2-u-boot.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) Siemens AG, 2018-2021
+ *
+ * Authors:
+ * Chao Zeng <chao.zeng@siemens.com>
+ *
+ * U-Boot bits of the IOT2050 Advanced PG2 variants
+ * (downgrade of usb0 to USB 2.0 mode)
+ */
+
+&serdes0 {
+ status = "disabled";
+};
+
+&dwc3_0 {
+ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
+ <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
+ /delete-property/ phys;
+ /delete-property/ phy-names;
+};
+
+&usb0 {
+ maximum-speed = "high-speed";
+ /delete-property/ snps,dis-u1-entry-quirk;
+ /delete-property/ snps,dis-u2-entry-quirk;
+};
diff --git a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
index c25bce7339..e7e0ca4159 100644
--- a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
@@ -44,8 +44,10 @@
phy-names = "usb3-phy";
};

-&usb0_phy {
+&usb0 {
maximum-speed = "super-speed";
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
};
+
+#include "k3-am65-iot2050-common-pg2-u-boot.dtsi"
--
2.31.1