From: "Pali Rohár" <pali@kernel.org>
To: Simon Glass <sjg@chromium.org>,
Vladimir Oltean <vladimir.oltean@nxp.com>,
Bin Meng <bmeng.cn@gmail.com>, Stefan Roese <sr@denx.de>
Cc: u-boot@lists.denx.de
Subject: [PATCH 2/5] pci: Skip configuring invalid P2P bridge devices
Date: Thu, 7 Oct 2021 14:50:58 +0200 [thread overview]
Message-ID: <20211007125101.21811-2-pali@kernel.org> (raw)
In-Reply-To: <20211007125101.21811-1-pali@kernel.org>
Function dm_pci_hose_probe_bus() expects that bus is valid PCI device with
Bridge header type (0x01). So add check before touching PCI config space to
prevent misconfiguring some non-standard device.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
drivers/pci/pci-uclass.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 044babee164f..5da3515f5f25 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -627,6 +627,7 @@ int pci_generic_mmap_read_config(
int dm_pci_hose_probe_bus(struct udevice *bus)
{
+ u8 header_type;
int sub_bus;
int ret;
int ea_pos;
@@ -634,6 +635,14 @@ int dm_pci_hose_probe_bus(struct udevice *bus)
debug("%s\n", __func__);
+ dm_pci_read_config8(bus, PCI_HEADER_TYPE, &header_type);
+ header_type &= 0x7f;
+ if (header_type != PCI_HEADER_TYPE_BRIDGE) {
+ debug("%s: Skipping PCI device %d with Non-Bridge Header Type 0x%x\n",
+ __func__, PCI_DEV(dm_pci_get_bdf(bus)), header_type);
+ return log_msg_ret("probe", -EINVAL);
+ }
+
ea_pos = dm_pci_find_capability(bus, PCI_CAP_ID_EA);
if (ea_pos) {
dm_pci_read_config8(bus, ea_pos + sizeof(u32) + sizeof(u8),
--
2.20.1
next prev parent reply other threads:[~2021-10-07 12:51 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-07 12:50 [PATCH 1/5] pci: Skip configuring PCI Rom Address for unsupported header types Pali Rohár
2021-10-07 12:50 ` Pali Rohár [this message]
2021-10-08 5:52 ` [PATCH 2/5] pci: Skip configuring invalid P2P bridge devices Stefan Roese
2021-10-15 11:52 ` Tom Rini
2021-10-07 12:50 ` [PATCH 3/5] pci: Fix configuring BARs Pali Rohár
2021-10-08 5:53 ` Stefan Roese
2021-10-15 11:52 ` Tom Rini
2021-10-07 12:51 ` [PATCH 4/5] pci: Fix showing bars Pali Rohár
2021-10-08 5:53 ` Stefan Roese
2021-10-15 11:52 ` Tom Rini
2021-10-07 12:51 ` [PATCH 5/5] pci: Fix showing registers Pali Rohár
2021-10-08 5:53 ` Stefan Roese
2021-10-15 11:52 ` Tom Rini
2021-10-08 5:52 ` [PATCH 1/5] pci: Skip configuring PCI Rom Address for unsupported header types Stefan Roese
2021-10-15 11:52 ` Tom Rini
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