From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F8BFC433F5 for ; Fri, 15 Oct 2021 17:27:37 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5B18F60F59 for ; Fri, 15 Oct 2021 17:27:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5B18F60F59 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3F30C82F9E; Fri, 15 Oct 2021 19:27:33 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=linux.intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id CE09C82F9E; Fri, 15 Oct 2021 19:27:30 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 15AD68362E for ; Fri, 15 Oct 2021 19:27:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=linux.intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=andriy.shevchenko@linux.intel.com X-IronPort-AV: E=McAfee;i="6200,9189,10138"; a="291437661" X-IronPort-AV: E=Sophos;i="5.85,376,1624345200"; d="scan'208";a="291437661" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2021 10:27:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,376,1624345200"; d="scan'208";a="549239273" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga004.fm.intel.com with ESMTP; 15 Oct 2021 10:27:22 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 8C6F886; Fri, 15 Oct 2021 20:11:50 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Bin Meng , Simon Glass , u-boot@lists.denx.de Subject: [PATCH v1 2/2] x86: edison: Don't take SD card detect pin into consideration Date: Fri, 15 Oct 2021 20:11:47 +0300 Message-Id: <20211015171147.51948-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211015171147.51948-1-andriy.shevchenko@linux.intel.com> References: <20211015171147.51948-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean There are two PCB designs in the wild which use the opposite signaling for SD card detect. This makes U-Boot working in one case and failing in the other. Quirk this out by disconnecting SD card detect pin from the PCB by switching to mode 3. BugLink: https://github.com/edison-fw/meta-intel-edison/issues/136 Signed-off-by: Andy Shevchenko --- arch/x86/dts/edison.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index 2c8cf6c07102..04e8a4e457c8 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -94,6 +94,7 @@ sdcard: mmc@ff3fa000 { compatible = "intel,sdhci-tangier"; reg = <0xff3fa000 0x1000>; + cd-inverted; }; pmu: power@ff00b000 { @@ -131,6 +132,17 @@ compatible = "intel,pinctrl-tangier"; reg = <0xff0c0000 0x8000>; + /* + * Disconnect SD card detect, so it won't affect the reality + * on two different PCB designs where it's using the opposite + * signaling: Edison/Arduino uses Active Low, while SparkFun + * went with Active High. + */ + sd_cd@0 { + pad-offset = <37>; + mode-func = <3>; + }; + /* * Initial configuration came from the firmware. * Which quite likely has been used in the phones, where I2C #8, -- 2.33.0