From: Kris Chaplin <kris.chaplin@linux.intel.com>
To: u-boot@lists.denx.de, kris.chaplin@linux.intel.com
Subject: [PATCH] mtd: spi-nor-ids: Add SECT_4K to mt25qu512a
Date: Mon, 18 Oct 2021 03:30:18 -0700 [thread overview]
Message-ID: <20211018103018.17337-1-kris.chaplin@linux.intel.com> (raw)
The mt25qu512a supports 4K or 64K sectors, so adding SECT_4K to enable 4K sector usage.
Datasheet: https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_512mb_1ce_3v_65nm.pdf
Tested on Intel n5x hardware with QSPI carrier card
Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com>
Tested by: Kris Chaplin <kris.chaplin@linux.intel.com>
---
drivers/mtd/spi/spi-nor-ids.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index f0c8041997..5359d09489 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -190,7 +190,7 @@ const struct flash_info spi_nor_ids[] = {
{ INFO6("mt25qu256a", 0x20bb19, 0x104400, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_FSR) },
{ INFO("n25q256ax1", 0x20bb19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | USE_FSR) },
{ INFO6("mt25qu512a", 0x20bb20, 0x104400, 64 * 1024, 1024,
- SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
USE_FSR) },
{ INFO("n25q512a", 0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
{ INFO6("mt25ql512a", 0x20ba20, 0x104400, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
--
2.25.1
next reply other threads:[~2021-10-18 11:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-18 10:30 Kris Chaplin [this message]
2021-10-19 18:38 ` [PATCH] mtd: spi-nor-ids: Add SECT_4K to mt25qu512a Pratyush Yadav
2021-10-20 9:43 ` Kris Chaplin
2021-10-20 11:55 ` Pratyush Yadav
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