From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59088C433F5 for ; Fri, 22 Oct 2021 14:24:33 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CE5D06109E for ; Fri, 22 Oct 2021 14:24:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org CE5D06109E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DEC5C8356A; Fri, 22 Oct 2021 16:23:50 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="ZLdlzfCk"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id DED118354C; Fri, 22 Oct 2021 16:23:18 +0200 (CEST) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 51A358353E for ; Fri, 22 Oct 2021 16:22:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: by mail.kernel.org (Postfix) with ESMTPSA id 28436610CB; Fri, 22 Oct 2021 14:22:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1634912568; bh=PJVKxC/2Jh9vPrhWDjWWKxFG2eLtt3Ch+yUnrqoXq2Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZLdlzfCkvwOHLWQ+6ToiZkB1hepQCnuIJksIs0chSemQebdGbDJkIi3zJkOyiUpGX fM3vGdKxypZBHcz/id8/+6cNd8fqpl04a0xHfF952jQzy51ROVLiv4bFk6rJQpJ+TS BscM46VlMAaS4HIAKX54BRV9iaWuOAZsl7lwTKwjmyWz0Bs62HergnmsEMULoqUsjn N7RWt5PI5Ufon4NtS+YLDevW7Tgj4N9ftdD44VE9M75rW/l11SThY4l/H0WKSctECW P/L1udPIyOXoSNax6p1uBFuMFf7ZNEcoLr9mn00Q8cYX0i8/ztdSWsWX0QM0FFMzNq lW3IUhSY3JJCA== Received: by pali.im (Postfix) id E2749E92; Fri, 22 Oct 2021 16:22:45 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese Cc: =?UTF-8?q?Marek=20Beh=C3=BAn?= , u-boot@lists.denx.de Subject: [PATCH 5/8] pci: pci_mvebu: Fix place of link up detection Date: Fri, 22 Oct 2021 16:22:12 +0200 Message-Id: <20211022142215.26484-6-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211022142215.26484-1-pali@kernel.org> References: <20211022142215.26484-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean PCI Bridge is always accessible also when link is down. So move detection of link up from mvebu_pcie_of_to_plat() function to mvebu_pcie_valid_addr() function which is used when accessing PCI config space. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún --- drivers/pci/pci_mvebu.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index 4b8e56f22dfa..40b8a57bbe1e 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -138,6 +138,10 @@ static bool mvebu_pcie_valid_addr(struct mvebu_pcie *pcie, if (busno == pcie->first_busno && (dev != 0 || func != 0)) return false; + /* Access to other buses is possible when link is up */ + if (busno != pcie->first_busno && !mvebu_pcie_link_up(pcie)) + return false; + /* On secondary bus can be only one PCIe device */ if (busno == pcie->sec_busno && dev != 0) return false; @@ -369,9 +373,6 @@ static int mvebu_pcie_probe(struct udevice *dev) struct pci_controller *hose = dev_get_uclass_priv(ctlr); u32 reg; - debug("%s: PCIe %d.%d - up, base %08x\n", __func__, - pcie->port, pcie->lane, (u32)pcie->base); - /* * Change Class Code of PCI Bridge device to PCI Bridge (0x600400) * because default value is Memory controller (0x508000) which @@ -603,13 +604,6 @@ static int mvebu_pcie_of_to_plat(struct udevice *dev) if (ret < 0) goto err; - /* Check link and skip ports that have no link */ - if (!mvebu_pcie_link_up(pcie)) { - debug("%s: %s - down\n", __func__, pcie->name); - ret = -ENODEV; - goto err; - } - return 0; err: -- 2.20.1