From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2719C433F5 for ; Fri, 22 Oct 2021 14:24:08 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 22AF960E96 for ; Fri, 22 Oct 2021 14:24:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 22AF960E96 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3972F83542; Fri, 22 Oct 2021 16:23:40 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="TTHvbi/f"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 725E78352E; Fri, 22 Oct 2021 16:23:12 +0200 (CEST) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5557F8353F for ; Fri, 22 Oct 2021 16:22:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: by mail.kernel.org (Postfix) with ESMTPSA id 2EDCD611F2; Fri, 22 Oct 2021 14:22:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1634912568; bh=pyCQLO1DA+Q813tgc6EQ3liK9eEYCA9V88L4razhwKA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TTHvbi/fxiDbMHUHBNO6d7ANZuaMvbSl828TOHHioKWj4bhAQglzFR9LbMVQZtfmE bhOPPeQgF7PAejxqfas9rFVOVCWAeqjFbW372DB6Se0w/BPLT/6y7QOMugBNdnpudF T1EwCsy5fAX1OAMTZlbRy8ei9twknZweH1YMfVK/EDZvvoXd2XV+23sNEeahcs62KV awNlX/ZGqKNyuYO+EQDG+lSBpPMzMsepl0DhuAVy5qloWEt7uBYLDuo+0OZIqDrppX XP6w53P2xLnUwkIveVamWpzL85CjabQeNInTRefVNiSnEeY/Od4wOfXvkQWlVGcf1z QnWlKTQ9jcigg== Received: by pali.im (Postfix) id 62956EA7; Fri, 22 Oct 2021 16:22:46 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese Cc: =?UTF-8?q?Marek=20Beh=C3=BAn?= , u-boot@lists.denx.de Subject: [PATCH 7/8] pci: pci_mvebu: Setup PCI controller to Root Complex mode Date: Fri, 22 Oct 2021 16:22:14 +0200 Message-Id: <20211022142215.26484-8-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211022142215.26484-1-pali@kernel.org> References: <20211022142215.26484-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Root Complex should be the default mode, let's set it explicitly. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún --- drivers/pci/pci_mvebu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index e43fa12d3819..b0c673d8c472 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -62,6 +62,7 @@ DECLARE_GLOBAL_DATA_PTR; #define PCIE_MASK_ENABLE_INTS (0xf << 24) #define PCIE_CTRL_OFF 0x1a00 #define PCIE_CTRL_X1_MODE BIT(0) +#define PCIE_CTRL_RC_MODE BIT(1) #define PCIE_STAT_OFF 0x1a04 #define PCIE_STAT_BUS (0xff << 8) #define PCIE_STAT_DEV (0x1f << 16) @@ -373,6 +374,11 @@ static int mvebu_pcie_probe(struct udevice *dev) struct pci_controller *hose = dev_get_uclass_priv(ctlr); u32 reg; + /* Setup PCIe controller to Root Complex mode */ + reg = readl(pcie->base + PCIE_CTRL_OFF); + reg |= PCIE_CTRL_RC_MODE; + writel(reg, pcie->base + PCIE_CTRL_OFF); + /* * Change Class Code of PCI Bridge device to PCI Bridge (0x600400) * because default value is Memory controller (0x508000) which -- 2.20.1