From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9332DC433F5 for ; Fri, 3 Dec 2021 06:20:27 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 42D4580F56; Fri, 3 Dec 2021 07:20:24 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 60EC280F56; Fri, 3 Dec 2021 07:20:22 +0100 (CET) Received: from ATCSQR.andestech.com (atcsqr.andestech.com [60.248.187.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 00C298015E for ; Fri, 3 Dec 2021 07:20:17 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by ATCSQR.andestech.com with ESMTP id 1B36Jc5X032010; Fri, 3 Dec 2021 14:19:38 +0800 (GMT-8) (envelope-from ycliang@andestech.com) Received: from atcsi01 (10.0.15.167) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Fri, 3 Dec 2021 14:19:35 +0800 Date: Fri, 3 Dec 2021 14:19:32 +0800 From: Leo Liang To: CC: , Subject: [PULL] u-boot-riscv/master Message-ID: <20211203061932.GA3611074@atcsi01> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline User-Agent: Mutt/1.13.2 (2019-12-18) X-Originating-IP: [10.0.15.167] X-DNSRBL: X-MAIL: ATCSQR.andestech.com 1B36Jc5X032010 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Hi Tom, The following changes since commit 4a14bfffd42f968ed9d72a780a8d44a9053c5b95: Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2021-11-30 08:59:22 -0500) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-riscv.git for you to fetch changes up to c0ffc12a701621dc72dfc896965cbfe5b0dbf9b4: riscv: Enable SPI flash env for SiFive Unmatched. (2021-12-02 16:43:56 +0800) CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/10128 ---------------------------------------------------------------- Leo Yu-Chi Liang (1): board: ae350: Support autoboot from RAM Padmarao Begari (5): net: macb: Remove Microchip compatible string i2c: Add Microchip PolarFire SoC I2C driver riscv: dts: Split Microchip device tree riscv: Update Microchip MPFS Icicle Kit support doc: board: Update Microchip MPFS Icicle Kit doc Thomas Skibo (2): riscv: Support booting SiFive Unmatched from SPI. riscv: Enable SPI flash env for SiFive Unmatched. arch/riscv/cpu/fu740/Kconfig | 13 + arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi | 11 + arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 518 +++++-------------- arch/riscv/dts/microchip-mpfs.dtsi | 571 +++++++++++++++++++++ board/microchip/mpfs_icicle/Kconfig | 5 + board/microchip/mpfs_icicle/mpfs_icicle.c | 17 +- board/sifive/unmatched/Kconfig | 1 + board/sifive/unmatched/spl.c | 3 + configs/microchip_mpfs_icicle_defconfig | 1 - configs/sifive_unmatched_defconfig | 6 + doc/board/microchip/mpfs_icicle.rst | 7 +- doc/board/sifive/unmatched.rst | 31 ++ drivers/i2c/Kconfig | 6 + drivers/i2c/Makefile | 1 + drivers/i2c/i2c-microchip.c | 482 +++++++++++++++++ drivers/net/macb.c | 18 +- include/configs/ax25-ae350.h | 13 +- .../interrupt-controller/microchip-mpfs-plic.h | 196 +++++++ .../dt-bindings/interrupt-controller/riscv-hart.h | 17 + 19 files changed, 1512 insertions(+), 405 deletions(-) create mode 100644 arch/riscv/dts/microchip-mpfs.dtsi create mode 100644 drivers/i2c/i2c-microchip.c create mode 100644 include/dt-bindings/interrupt-controller/microchip-mpfs-plic.h create mode 100644 include/dt-bindings/interrupt-controller/riscv-hart.h Best regards, Leo