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From: Pratyush Yadav <p.yadav@ti.com>
To: <Tudor.Ambarus@microchip.com>
Cc: <jagan@amarulasolutions.com>, <vigneshr@ti.com>,
	<u-boot@lists.denx.de>, <Nicolas.Ferre@microchip.com>
Subject: Re: [PATCH v2 3/4] Revert "mtd: spi-nor-core: Perform a Soft Reset on boot"
Date: Fri, 17 Dec 2021 16:10:15 +0530	[thread overview]
Message-ID: <20211217104013.edh4ide4t2jd5que@ti.com> (raw)
In-Reply-To: <7ad443bb-a0be-7eef-9d65-a21c3cc7412f@microchip.com>

On 17/12/21 06:27AM, Tudor.Ambarus@microchip.com wrote:
> On 12/16/21 8:45 PM, Pratyush Yadav wrote:
> >>>>
> >>>>>
> >>>>>> SFDP signature to determine the mode in which the flash is configured:
> >>>>>> '''
> >>>>>> try to read the SFDP signature (see 6.1) in 4-4-4 mode, if that fails
> >>>>>> try 2-2-2 mode, and if that fails try 1-1-1 mode. For Octal devices,
> >>>>>> these typically support SFDP read operation in both 1S-1S-1S mode and
> >>>>>> 8D-8D-8D mode. If the host controller does not know exactly which
> >>>>>> protocol mode is used for SFDP in 8D-8D-8D mode, this information can be
> >>>>>> found by reading SFDP in 1S-1S-1S mode first. (To read an unknown device
> >>>>>> directly in 8D-8D-8D mode, the host controller may read from address 0,
> >>>>>> and count the number of dummy clocks required before the SFDP signature
> >>>>>> is received.)
> >>>>>> '''
> >>>>
> >>>> Below is the approach for the flashes that are not SFDP compliant:
> >>>>
> >>>>>> If the flash does not support SFDP at all, one should introduce dedicated
> >>>>>> configs for each reset type and issue just the needed reset command.
> >>>
> >>> There are some problems with this approach. What if we have two flashes
> >>> on the board and both use different reset types? How do we figure out
> >>> which reset to apply? This applies to the current implementation as
> >>> well. If there are two flashes then it will issue the reset to both even
> >>> if one of them does not support/need it.
> >>
> >> One would have to choose the NOR manufacturer with care next time. If we'll
> >> have to statically define the reset type for both the flashes, there's nothing
> >> much we can do. Maybe if you have a gpio reset line connected to the flash you
> >> can toggle that instead.
> > 
> > Or we can specify the reset type in the device tree? That should neatly
> > solve the problem I believe.
> > 
> 
> It is surely an approach to consider. The downside with it is that people might
> abuse it, and use it regardless if the reset type is defined in SFDP or not.
> Do we care?

I am not sure to be honest. Let's think through that once the problem 
actually comes up I suppose.

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.

  reply	other threads:[~2021-12-17 10:40 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-03 23:49 [PATCH v2 0/4] mtd: spi-nor: Fix software reset; add mx66lm1g45g Tudor Ambarus
2021-11-03 23:49 ` [PATCH v2 1/4] mtd: spi-nor-core: Introduce SPI_NOR_SOFT_RESET flash_info flag Tudor Ambarus
2021-11-09 19:31   ` Pratyush Yadav
2021-11-03 23:49 ` [PATCH v2 2/4] mtd: spi-nor-core: macronix: Add support for mx66lm1g45g Tudor Ambarus
2021-11-12 21:50   ` Pratyush Yadav
2021-11-13 13:48   ` Jagan Teki
2021-11-15  5:25     ` Tudor.Ambarus
2021-11-03 23:49 ` [PATCH v2 3/4] Revert "mtd: spi-nor-core: Perform a Soft Reset on boot" Tudor Ambarus
2021-11-09 19:26   ` Pratyush Yadav
2021-11-10  8:44     ` Tudor.Ambarus
2021-11-12 13:13       ` Pratyush Yadav
2021-11-15  5:44         ` Tudor.Ambarus
2021-12-16 18:45           ` Pratyush Yadav
2021-12-17  6:27             ` Tudor.Ambarus
2021-12-17 10:40               ` Pratyush Yadav [this message]
2021-11-03 23:49 ` [PATCH v2 4/4] mtd: spi-nor-core: Fix the opcode extension for the software reset sequence Tudor Ambarus
2021-11-09 19:29   ` Pratyush Yadav

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