From: "Pali Rohár" <pali@kernel.org>
To: "Stefan Roese" <sr@denx.de>, "Dirk Eibach" <dirk.eibach@gdsys.cc>,
"Mario Six" <mario.six@gdsys.cc>,
"Marek Behún" <marek.behun@nic.cz>,
"Chris Packham" <judge.packham@gmail.com>
Cc: u-boot@lists.denx.de
Subject: [PATCH u-boot-marvell 4/9] pci: pci_mvebu: Inline mvebu_pcie_port_parse_dt() function
Date: Tue, 21 Dec 2021 12:20:14 +0100 [thread overview]
Message-ID: <20211221112019.15088-5-pali@kernel.org> (raw)
In-Reply-To: <20211221112019.15088-1-pali@kernel.org>
Function mvebu_pcie_port_parse_dt() is called only from
mvebu_pcie_of_to_plat() function. Both these function parse DT properties
required to setup mvebu pcie. So inline mvebu_pcie_port_parse_dt() function
into mvebu_pcie_of_to_plat() to have all code related to parsing DT
properties at one place.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
drivers/pci/pci_mvebu.c | 27 +++++++++------------------
1 file changed, 9 insertions(+), 18 deletions(-)
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index eaaa6cbe326d..c47551807bc2 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -488,22 +488,6 @@ static int mvebu_pcie_probe(struct udevice *dev)
return 0;
}
-static int mvebu_pcie_port_parse_dt(ofnode node, struct mvebu_pcie *pcie)
-{
- const u32 *addr;
- int len;
-
- addr = ofnode_get_property(node, "assigned-addresses", &len);
- if (!addr) {
- pr_err("property \"assigned-addresses\" not found");
- return -FDT_ERR_NOTFOUND;
- }
-
- pcie->base = (void *)(fdt32_to_cpu(addr[2]) + SOC_REGS_PHY_BASE);
-
- return 0;
-}
-
#define DT_FLAGS_TO_TYPE(flags) (((flags) >> 24) & 0x03)
#define DT_TYPE_IO 0x1
#define DT_TYPE_MEM32 0x2
@@ -567,7 +551,9 @@ static int mvebu_get_tgt_attr(ofnode node, int devfn,
static int mvebu_pcie_of_to_plat(struct udevice *dev)
{
struct mvebu_pcie *pcie = dev_get_plat(dev);
+ const u32 *addr;
int ret = 0;
+ int len;
/* Get port number, lane number and memory target / attr */
if (ofnode_read_u32(dev_ofnode(dev), "marvell,pcie-port",
@@ -605,9 +591,14 @@ static int mvebu_pcie_of_to_plat(struct udevice *dev)
}
/* Parse PCIe controller register base from DT */
- ret = mvebu_pcie_port_parse_dt(dev_ofnode(dev), pcie);
- if (ret < 0)
+ addr = ofnode_get_property(dev_ofnode(dev), "assigned-addresses", &len);
+ if (!addr) {
+ printf("%s: property \"assigned-addresses\" not found\n", pcie->name);
+ ret = -FDT_ERR_NOTFOUND;
goto err;
+ }
+
+ pcie->base = (void *)(fdt32_to_cpu(addr[2]) + SOC_REGS_PHY_BASE);
return 0;
--
2.20.1
next prev parent reply other threads:[~2021-12-21 11:22 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-21 11:20 [PATCH u-boot-marvell 0/9] mvebu: Move PCIe code from serdes to PCIe driver Pali Rohár
2021-12-21 11:20 ` [PATCH u-boot-marvell 1/9] arm: mvebu: Convert board_pex_config() to CONFIG_SPL_BOARD_INIT Pali Rohár
2021-12-21 11:20 ` [PATCH u-boot-marvell 2/9] board: gdsys: a38x: Enable PCIe link 2 in spl_board_init() Pali Rohár
2021-12-21 11:20 ` [PATCH u-boot-marvell 3/9] pci: pci_mvebu: Fix PCIe MEM and IO resources assignment and mbus mapping Pali Rohár
2021-12-21 11:20 ` Pali Rohár [this message]
2021-12-21 11:20 ` [PATCH u-boot-marvell 5/9] pci: pci_mvebu: Remove dependency on SOC_REGS_PHY_BASE macro Pali Rohár
2021-12-21 11:20 ` [PATCH u-boot-marvell 6/9] pci: pci_mvebu: Split initialization of PCIe ports into 3 phases Pali Rohár
2021-12-21 11:20 ` [PATCH u-boot-marvell 7/9] pci: pci_mvebu: Wait 100ms for Link Up in mvebu_pcie_probe() Pali Rohár
2021-12-21 11:20 ` [PATCH u-boot-marvell 8/9] arm: mvebu: Implement simple mvebu-reset driver for enabling/disabling PCIe ports Pali Rohár
2021-12-21 11:20 ` [PATCH u-boot-marvell 9/9] arm: mvebu: a38x: serdes: Move non-serdes PCIe code to pci_mvebu.c Pali Rohár
2022-01-04 22:08 ` [PATCH u-boot-marvell 0/9] mvebu: Move PCIe code from serdes to PCIe driver Pali Rohár
2022-01-14 15:33 ` Stefan Roese
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