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From: Markus Koch <markus@notsyncing.net>
To: joe.hershberger@ni.com, rfried.dev@gmail.com
Cc: u-boot@lists.denx.de, Markus Koch <markus@notsyncing.net>
Subject: [PATCH] net: fsl_mdio: Fix busy flag polling register
Date: Sun,  2 Jan 2022 18:34:18 +0100	[thread overview]
Message-ID: <20220102173416.140968-1-markus@notsyncing.net> (raw)

NXP's mEMAC reference manual, Chapter 6.5.5 "MDIO Ethernet Management
Interface usage", specifies to poll the BSY (0) bit in the CFG (we call
it CTL) register to wait until a transaction has finished, not bit 31 in
the data register.

In the Linux kernel, this has already been fixed in commit 26eee0210ad7
("net/fsl: fix a bug in xgmac_mdio").

Signed-off-by: Markus Koch <markus@notsyncing.net>
---

I only stumbled over this section of code while looking at something else, but
I'm surprised this even works the way it is now. Maybe it's luck.

Sadly I have not yet had the chance to test this change on actual hardware, and
I'm not sure I will anytime soon, so I'm asking whether there's anyone who
could compile and run my code to see whether MDIO transactions work as expected.

Thanks!
Markus

 drivers/net/fm/memac_phy.c | 2 +-
 include/fsl_memac.h        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index 72b500a6d1..0af6e83a8f 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -64,7 +64,7 @@ static int memac_wait_until_done(struct memac_mdio_controller *regs)
 {
 	unsigned int timeout = MAX_NUM_RETRIES;
 
-	while ((memac_in_32(&regs->mdio_data) & MDIO_DATA_BSY) && timeout--)
+	while ((memac_in_32(&regs->mdio_ctl) & MDIO_CTL_BSY) && timeout--)
 		;
 
 	if (!timeout) {
diff --git a/include/fsl_memac.h b/include/fsl_memac.h
index d067f1511c..d973fc0a5e 100644
--- a/include/fsl_memac.h
+++ b/include/fsl_memac.h
@@ -246,6 +246,7 @@ struct memac_mdio_controller {
 #define MDIO_STAT_HOLD_15_CLK	(7 << 2)
 #define MDIO_STAT_NEG		(1 << 23)
 
+#define MDIO_CTL_BSY		(1 << 0)
 #define MDIO_CTL_DEV_ADDR(x)	(x & 0x1f)
 #define MDIO_CTL_PORT_ADDR(x)	((x & 0x1f) << 5)
 #define MDIO_CTL_PRE_DIS	(1 << 10)
@@ -254,7 +255,6 @@ struct memac_mdio_controller {
 #define MDIO_CTL_READ		(1 << 15)
 
 #define MDIO_DATA(x)		(x & 0xffff)
-#define MDIO_DATA_BSY		(1 << 31)
 
 struct fsl_enet_mac;
 
-- 
2.34.1


             reply	other threads:[~2022-01-03 22:07 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-02 17:34 Markus Koch [this message]
2022-01-04  6:32 ` [PATCH] net: fsl_mdio: Fix busy flag polling register Ramon Fried
2022-01-04 14:24 ` Ioana Ciornei

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