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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id gb10sm1603714ejc.49.2022.01.07.10.34.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Jan 2022 10:34:14 -0800 (PST) From: Johan Jonker To: kever.yang@rock-chips.com Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, peng.fan@nxp.com, jh80.chung@samsung.com, u-boot@lists.denx.de Subject: [PATCH v1 2/2] rockchip: mmc: rockchip_dw_mmc: add rk3066/rk3188 support Date: Fri, 7 Jan 2022 19:34:06 +0100 Message-Id: <20220107183406.1804-2-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220107183406.1804-1-jbx6244@gmail.com> References: <20220107183406.1804-1-jbx6244@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean The Rockchip SoCs rk3066/rk3188 have mmc DT nodes with as compatible string "rockchip,rk2928-dw-mshc". Add support to the existing driver with help of a DM_DRIVER_ALIAS. This type needs a permanent enabled fifo. The other Rockchip SoCs not always have the property "fifo-mode" in the TPL/SPL DT nodes, so dtplat structures can't be used to switch it on. Add a data structure linked to the compatible string to enable. Signed-off-by: Johan Jonker --- drivers/mmc/rockchip_dw_mmc.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index be065ec0..5fdfcef2 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -19,6 +19,11 @@ #include #include +enum rockchip_dwmmc_type { + RK2928_MSHC, + RK3288_MSHC, +}; + struct rockchip_mmc_plat { #if CONFIG_IS_ENABLED(OF_PLATDATA) struct dtd_rockchip_rk3288_dw_mshc dtplat; @@ -111,6 +116,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev) #if CONFIG_IS_ENABLED(OF_PLATDATA) struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat; + enum rockchip_dwmmc_type type = dev_get_driver_data(dev); host->name = dev->name; host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); @@ -119,7 +125,10 @@ static int rockchip_dwmmc_probe(struct udevice *dev) host->priv = dev; host->dev_index = 0; priv->fifo_depth = dtplat->fifo_depth; - priv->fifo_mode = 0; + if (type == RK2928_MSHC) + priv->fifo_mode = 1; + else + priv->fifo_mode = 0; priv->minmax[0] = 400000; /* 400 kHz */ priv->minmax[1] = dtplat->max_frequency; @@ -163,8 +172,8 @@ static int rockchip_dwmmc_bind(struct udevice *dev) } static const struct udevice_id rockchip_dwmmc_ids[] = { - { .compatible = "rockchip,rk2928-dw-mshc" }, - { .compatible = "rockchip,rk3288-dw-mshc" }, + { .compatible = "rockchip,rk2928-dw-mshc", .data = RK2928_MSHC }, + { .compatible = "rockchip,rk3288-dw-mshc", .data = RK3288_MSHC }, { } }; @@ -180,5 +189,6 @@ U_BOOT_DRIVER(rockchip_rk3288_dw_mshc) = { .plat_auto = sizeof(struct rockchip_mmc_plat), }; +DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk2928_dw_mshc) DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3328_dw_mshc) DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3368_dw_mshc) -- 2.20.1