From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A6E34C433F5 for ; Sun, 9 Jan 2022 17:32:07 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4F18A8373B; Sun, 9 Jan 2022 18:31:43 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 325A383693; Sun, 9 Jan 2022 18:31:40 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 359B4834DE for ; Sun, 9 Jan 2022 18:31:37 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 70682ED1; Sun, 9 Jan 2022 09:31:36 -0800 (PST) Received: from localhost.localdomain (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B5C603F774; Sun, 9 Jan 2022 09:31:34 -0800 (PST) From: Andre Przywara To: Tom Rini Cc: Simon Glass , Heinrich Schuchardt , Alison Wang , Michael Walle , Nishanth Menon , Priyanka Singh , Peter Hoyes , Marek Vasut , u-boot@lists.denx.de Subject: [PATCH 3/6] armv8: Force SP_ELx stack pointer usage Date: Sun, 9 Jan 2022 17:30:06 +0000 Message-Id: <20220109173009.25522-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20220109173009.25522-1-andre.przywara@arm.com> References: <20220109173009.25522-1-andre.przywara@arm.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean In ARMv8 we have the choice between two stack pointers to use: SP_EL0 or SP_ELx, which is banked per exception level. This choice is stored in the SP field of PState, and can be read and set via the SPSel special register. When the CPU takes an exception, it automatically switches to the SP_ELx stack pointer. Trusted Firmware enters U-Boot typically with SPSel set to 1, so we use SP_ELx all along as our sole stack pointer, both for normal operation and for exceptions. But if we now for some reason enter U-Boot with SPSel cleared, we will setup and use SP_EL0, which is fine, but leaves SP_ELx uninitialised. When we now take an exception, we try to save the GPRs to some undefined location, which will usually end badly. To make sure we always have SP_ELx pointing to some memory, set SPSel to 1 in the early boot code, to ensure safe operation at all times. Signed-off-by: Andre Przywara --- arch/arm/cpu/armv8/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index a26c18329cb..47a612883c5 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -196,6 +196,7 @@ slave_cpu: br x0 /* branch to the given address */ #endif /* CONFIG_ARMV8_MULTIENTRY */ master_cpu: + msr SPSel, #1 /* make sure we use SP_ELx */ bl _main #ifdef CONFIG_SYS_RESET_SCTRL -- 2.17.6